From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 741AA3857C70; Thu, 24 Dec 2020 02:34:16 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 741AA3857C70 From: "crazylht at gmail dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/97891] [x86] Consider using registers on large initializations Date: Thu, 24 Dec 2020 02:34:16 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 11.0 X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: normal X-Bugzilla-Who: crazylht at gmail dot com X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 24 Dec 2020 02:34:16 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D97891 --- Comment #6 from Hongtao.liu --- cat test.c typedef struct { long a; long b; }TI; extern TI r; void foo () { r.a =3D 0; r.b =3D 0; } gcc -Ofast -march=3Dcascadelake -S got foo: .LFB0: .cfi_startproc movq $0, r(%rip) movq $0, r+8(%rip) ret .cfi_endproc .LFE0: SLP failed to vectorize due to cost test1.c:10:7: note: =3D=3D=3D vect_slp_analyze_instance_alignment =3D=3D= =3D test1.c:10:7: note: vect_compute_data_ref_alignment: test1.c:10:7: note: can't force alignment of ref: r.a test1.c:10:7: note: =3D=3D=3D vect_slp_analyze_instance_dependence =3D=3D= =3D test1.c:10:7: note: =3D=3D=3D vect_slp_analyze_operations =3D=3D=3D test1.c:10:7: note: =3D=3D> examining statement: r.a =3D 0; test1.c:10:7: note: vect_is_simple_use: operand 0, type of def: constant test1.c:10:7: note: Vectorizing an unaligned access. test1.c:10:7: note: vect_model_store_cost: unaligned supported by hardwar= e. test1.c:10:7: note: vect_model_store_cost: inside_cost =3D 16, prologue_c= ost =3D 0 . test1.c:10:7: note: =3D=3D=3D vect_bb_partition_graph =3D=3D=3D test1.c:10:7: note: ***** Analysis succeeded with vector mode V16QI test1.c:10:7: note: SLPing BB part 0x48bc3d0 0 1 times unaligned_store (misalign -1) costs 16 in body 0x48bc3d0 1 times vector_load costs 12 in prologue 0x48bbf50 0 1 times scalar_store costs 12 in body 0x48bbf50 0 1 times scalar_store costs 12 in body test1.c:10:7: note: Cost model analysis:=20 Vector inside of basic block cost: 16 Vector prologue cost: 12 Vector epilogue cost: 0 Scalar cost of basic block: 24 Shouldn't cost of zero vector CTOR be different from normal ones? Since x86 could have pxor, similar for aarch64 (eor??).=