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* [Bug target/97939] New: ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs
@ 2020-11-23 0:48 vincent-gcc at vinc17 dot net
2020-11-23 0:49 ` [Bug target/97939] " vincent-gcc at vinc17 dot net
` (11 more replies)
0 siblings, 12 replies; 13+ messages in thread
From: vincent-gcc at vinc17 dot net @ 2020-11-23 0:48 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97939
Bug ID: 97939
Summary: ICE on sparc64 with UBsan for "i + 4096" on long:
unrecognizable insn during RTL pass: vregs
Product: gcc
Version: 10.2.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: vincent-gcc at vinc17 dot net
Target Milestone: ---
On the following code:
long f (long i)
{
return i + 4096;
}
I get:
vinc17@gcc202:~$ gcc -fsanitize=undefined -c tst.c
tst.c: In function ‘f’:
tst.c:4:1: error: unrecognizable insn:
4 | }
| ^
(insn 7 6 8 2 (parallel [
(set (reg:CCXV 100 %icc)
(compare:CCXV (plus:DI (reg:DI 113)
(const_int 4096 [0x1000]))
(unspec:DI [
(reg:DI 113)
(const_int 4096 [0x1000])
] UNSPEC_ADDV)))
(set (reg:DI 112)
(plus:DI (reg:DI 113)
(const_int 4096 [0x1000])))
]) "tst.c":3:12 -1
(nil))
during RTL pass: vregs
tst.c:4:1: internal compiler error: in extract_insn, at recog.c:2294
0xfff8000100e72803 __libc_start_main
./csu/libc-start.c:308
I don't get any error on the following constants: 2048, 4095, 4097, 8192.
4096 seems special!
Note: I found this issue when trying to build GMP 6.2.1 with UBsan. The failure
occurs on extract-dbl.c at line
exp = (exp + 64 * GMP_NUMB_BITS) / GMP_NUMB_BITS - 64 * GMP_NUMB_BITS /
GMP_NUMB_BITS + 1;
due to the "exp + 64 * GMP_NUMB_BITS" with GMP_NUMB_BITS = 64.
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Bug target/97939] ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs
2020-11-23 0:48 [Bug target/97939] New: ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs vincent-gcc at vinc17 dot net
@ 2020-11-23 0:49 ` vincent-gcc at vinc17 dot net
2020-11-23 8:04 ` ebotcazou at gcc dot gnu.org
` (10 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: vincent-gcc at vinc17 dot net @ 2020-11-23 0:49 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97939
--- Comment #1 from Vincent Lefèvre <vincent-gcc at vinc17 dot net> ---
I forgot: That's a Debian sid machine with
Using built-in specs.
COLLECT_GCC=gcc
COLLECT_LTO_WRAPPER=/usr/lib/gcc/sparc64-linux-gnu/10/lto-wrapper
Target: sparc64-linux-gnu
Configured with: ../src/configure -v --with-pkgversion='Debian 10.2.0-17'
--with
-bugurl=file:///usr/share/doc/gcc-10/README.Bugs
--enable-languages=c,ada,c++,go
,d,fortran,objc,obj-c++,m2 --prefix=/usr --with-gcc-major-version-only
--program
-suffix=-10 --program-prefix=sparc64-linux-gnu- --enable-shared
--enable-linker-
build-id --libexecdir=/usr/lib --without-included-gettext
--enable-threads=posix
--libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug
--
enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new
--enable-gnu-unique-o
bject --disable-libquadmath --disable-libquadmath-support --enable-plugin
--enab
le-default-pie --with-system-zlib --disable-libphobos --enable-objc-gc=auto
--en
able-multiarch --disable-werror --with-cpu-32=ultrasparc --enable-targets=all
--
with-long-double-128 --enable-multilib --enable-checking=release
--build=sparc64-linux-gnu --host=sparc64-linux-gnu --target=sparc64-linux-gnu
Thread model: posix
Supported LTO compression algorithms: zlib zstd
gcc version 10.2.0 (Debian 10.2.0-17)
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Bug target/97939] ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs
2020-11-23 0:48 [Bug target/97939] New: ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs vincent-gcc at vinc17 dot net
2020-11-23 0:49 ` [Bug target/97939] " vincent-gcc at vinc17 dot net
@ 2020-11-23 8:04 ` ebotcazou at gcc dot gnu.org
2020-11-23 8:04 ` ebotcazou at gcc dot gnu.org
` (9 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: ebotcazou at gcc dot gnu.org @ 2020-11-23 8:04 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97939
Eric Botcazou <ebotcazou at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Last reconfirmed| |2020-11-23
Ever confirmed|0 |1
Status|UNCONFIRMED |NEW
CC| |ebotcazou at gcc dot gnu.org
--- Comment #2 from Eric Botcazou <ebotcazou at gcc dot gnu.org> ---
> I don't get any error on the following constants: 2048, 4095, 4097, 8192.
> 4096 seems special!
Welcome to the RISC world and its magic integer constants! :-)
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Bug target/97939] ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs
2020-11-23 0:48 [Bug target/97939] New: ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs vincent-gcc at vinc17 dot net
2020-11-23 0:49 ` [Bug target/97939] " vincent-gcc at vinc17 dot net
2020-11-23 8:04 ` ebotcazou at gcc dot gnu.org
@ 2020-11-23 8:04 ` ebotcazou at gcc dot gnu.org
2020-11-26 8:25 ` dclarke at blastwave dot org
` (8 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: ebotcazou at gcc dot gnu.org @ 2020-11-23 8:04 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97939
Eric Botcazou <ebotcazou at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |ASSIGNED
Assignee|unassigned at gcc dot gnu.org |ebotcazou at gcc dot gnu.org
--- Comment #3 from Eric Botcazou <ebotcazou at gcc dot gnu.org> ---
Investigating.
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Bug target/97939] ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs
2020-11-23 0:48 [Bug target/97939] New: ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs vincent-gcc at vinc17 dot net
` (2 preceding siblings ...)
2020-11-23 8:04 ` ebotcazou at gcc dot gnu.org
@ 2020-11-26 8:25 ` dclarke at blastwave dot org
2020-11-27 7:55 ` dclarke at blastwave dot org
` (7 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: dclarke at blastwave dot org @ 2020-11-26 8:25 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97939
Dennis Clarke <dclarke at blastwave dot org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |dclarke at blastwave dot org
--- Comment #4 from Dennis Clarke <dclarke at blastwave dot org> ---
Merely a little followup here. I did see that a unit test in the new
libgmp was failing in strange ways on sparc64 and thus I did a round of
tests with the previous libgmp and with two versions of gcc on Debisn
sid. In all cases the libgmp test failed but only on one platform.
https://gmplib.org/list-archives/gmp-bugs/2020-November/004962.html
The idea on the table is that we have a compiler fault here and then
Vincent Lefèvre seems to have isolated the code test down to a trivial
test case.
To add on here I see the same sort of behavior with gcc 8.1.0 on a
Solaris sparcv9 server :
isc $
isc $ uname -a
SunOS isc 5.10 Generic_150400-44 sun4u sparc SUNW,UltraAX-i2
isc $ /usr/local/gcc8/bin/gcc --version
gcc (genunix Fri May 11 08:23:40 GMT 2018) 8.1.0
Copyright (C) 2018 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
isc $ $CC -fsanitize=undefined -v -c tst.c
Using built-in specs.
COLLECT_GCC=/usr/local/gcc8/bin/gcc
Target: sparc64-sun-solaris2.10
Configured with: ../gcc-8.1.0/configure --prefix=/usr/local/gcc8
--build=sparc64-sun-solaris2.10 --target=sparc64-sun-solaris2.10
--host=sparc64-sun-solaris2.10 --without-gnu-as --without-gnu-ld
--with-as=/usr/ccs/bin/as --with-ld=/usr/ccs/bin/sparcv9/ld --disable-nls
--enable-threads=posix --enable-shared --with-gmp=/usr/local
--with-mpfr=/usr/local --with-mpc=/usr/local --with-isl=/usr/local
--with-build-time-tools=/usr/local/bin --with-cpu=v9 --enable-bootstrap
--enable-stage1-languages=c,c++ --enable-stage1-checking=misc
--enable-languages=ada,c,c++,fortran,go,lto,objc,obj-c++
--with-pkgversion='genunix Fri May 11 08:23:40 GMT 2018'
Thread model: posix
gcc version 8.1.0 (genunix Fri May 11 08:23:40 GMT 2018)
COLLECT_GCC_OPTIONS='-fsanitize=undefined' '-v' '-c' '-mcpu=v9'
/usr/local/gcc8/libexec/gcc/sparc64-sun-solaris2.10/8.1.0/cc1 -quiet -v
-D__arch64__ -D__sparcv9 tst.c -quiet -dumpbase tst.c -mcpu=v9 -auxbase tst
-version -fsanitize=undefined -o /var/tmp//ccI8b25O.s
GNU C17 (genunix Fri May 11 08:23:40 GMT 2018) version 8.1.0
(sparc64-sun-solaris2.10)
compiled by GNU C version 8.1.0, GMP version 6.1.2, MPFR version
4.0.1-p6, MPC version 1.1.0, isl version isl-0.19-GMP
warning: MPFR header version 4.0.1-p6 differs from library version 4.0.1.
GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072
ignoring nonexistent directory
"/usr/local/gcc8/lib/gcc/sparc64-sun-solaris2.10/8.1.0/../../../../sparc64-sun-solaris2.10/include"
#include "..." search starts here:
#include <...> search starts here:
/usr/local/gcc8/lib/gcc/sparc64-sun-solaris2.10/8.1.0/include
/usr/local/include
/usr/local/gcc8/include
/usr/local/gcc8/lib/gcc/sparc64-sun-solaris2.10/8.1.0/include-fixed
/usr/include
End of search list.
GNU C17 (genunix Fri May 11 08:23:40 GMT 2018) version 8.1.0
(sparc64-sun-solaris2.10)
compiled by GNU C version 8.1.0, GMP version 6.1.2, MPFR version
4.0.1-p6, MPC version 1.1.0, isl version isl-0.19-GMP
warning: MPFR header version 4.0.1-p6 differs from library version 4.0.1.
GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072
Compiler executable checksum: 56c9e74e9d01ca812c9fcd9ec58a5d7d
tst.c: In function 'f':
tst.c:5:1: error: unrecognizable insn:
}
^
(insn 7 6 8 2 (parallel [
(set (reg:CCXV 100 %icc)
(compare:CCXV (plus:DI (reg:DI 112)
(const_int 4096 [0x1000]))
(unspec:DI [
(reg:DI 112)
(const_int 4096 [0x1000])
] UNSPEC_ADDV)))
(set (reg:DI 111)
(plus:DI (reg:DI 112)
(const_int 4096 [0x1000])))
]) "tst.c":4 -1
(nil))
during RTL pass: vregs
tst.c:5:1: internal compiler error: in extract_insn, at recog.c:2304
0x100daff3b _fatal_insn(char const*, rtx_def const*, char const*, int, char
const*)
../../gcc-8.1.0/gcc/rtl-error.c:108
0x100daff73 _fatal_insn_not_found(rtx_def const*, char const*, int, char
const*)
../../gcc-8.1.0/gcc/rtl-error.c:116
0x1005e15eb extract_insn(rtx_insn*)
../../gcc-8.1.0/gcc/recog.c:2304
0x1003c0a57 instantiate_virtual_regs_in_insn
../../gcc-8.1.0/gcc/function.c:1648
0x1003c0a57 instantiate_virtual_regs
../../gcc-8.1.0/gcc/function.c:1969
0x1003c0a57 execute
../../gcc-8.1.0/gcc/function.c:2018
Please submit a full bug report,
with preprocessed source if appropriate.
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.
isc $
I will try this same test on Debian sid with both the previous
release gcc 9.3.0 ( Debian 9.3.0-18 ) and also the with the latest
gcc 10.2.0 (Debian 10.2.0-17) wherein I expect to see similar
results :
ceres$
ceres$ /usr/bin/gcc-9 -v -fsanitize=undefined -v -c tst.c
Using built-in specs.
COLLECT_GCC=/usr/bin/gcc-9
Target: sparc64-linux-gnu
Configured with: ../src/configure -v --with-pkgversion='Debian 9.3.0-18'
--with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs
--enable-languages=c,ada,c++,go,d,fortran,objc,obj-c++,gm2 --prefix=/usr
--with-gcc-major-version-only --program-suffix=-9
--program-prefix=sparc64-linux-gnu- --enable-shared --enable-linker-build-id
--libexecdir=/usr/lib --without-included-gettext --enable-threads=posix
--libdir=/usr/lib --enable-nls --enable-bootstrap --enable-clocale=gnu
--enable-libstdcxx-debug --enable-libstdcxx-time=yes
--with-default-libstdcxx-abi=new --enable-gnu-unique-object
--disable-libquadmath --disable-libquadmath-support --enable-plugin
--enable-default-pie --with-system-zlib --disable-libphobos
--enable-objc-gc=auto --enable-multiarch --disable-werror
--with-cpu-32=ultrasparc --enable-targets=all --with-long-double-128
--enable-multilib --enable-checking=release --build=sparc64-linux-gnu
--host=sparc64-linux-gnu --target=sparc64-linux-gnu
Thread model: posix
gcc version 9.3.0 (Debian 9.3.0-18)
COLLECT_GCC_OPTIONS='-v' '-fsanitize=undefined' '-v' '-c' '-mcpu=v9'
/usr/lib/gcc/sparc64-linux-gnu/9/cc1 -quiet -v -v -imultiarch
sparc64-linux-gnu -D__sparc_v9__ -D__arch64__ tst.c -quiet -dumpbase tst.c
-mcpu=v9 -auxbase tst -version -fsanitize=undefined -o
/var/tmp/dclarke/ccE9gIDO.s
GNU C17 (Debian 9.3.0-18) version 9.3.0 (sparc64-linux-gnu)
compiled by GNU C version 9.3.0, GMP version 6.2.0, MPFR version 4.1.0,
MPC version 1.2.0, isl version isl-0.22.1-GMP
warning: GMP header version 6.2.0 differs from library version 6.2.1.
GGC heuristics: --param ggc-min-expand=97 --param ggc-min-heapsize=127207
ignoring nonexistent directory "/usr/local/include/sparc64-linux-gnu"
ignoring nonexistent directory "/usr/lib/gcc/sparc64-linux-gnu/9/include-fixed"
ignoring nonexistent directory
"/usr/lib/gcc/sparc64-linux-gnu/9/../../../../sparc64-linux-gnu/include"
#include "..." search starts here:
#include <...> search starts here:
/usr/lib/gcc/sparc64-linux-gnu/9/include
/usr/local/include
/usr/include/sparc64-linux-gnu
/usr/include
End of search list.
GNU C17 (Debian 9.3.0-18) version 9.3.0 (sparc64-linux-gnu)
compiled by GNU C version 9.3.0, GMP version 6.2.0, MPFR version 4.1.0,
MPC version 1.2.0, isl version isl-0.22.1-GMP
warning: GMP header version 6.2.0 differs from library version 6.2.1.
GGC heuristics: --param ggc-min-expand=97 --param ggc-min-heapsize=127207
Compiler executable checksum: d73310b8041d45fee0423dc805f5c657
tst.c: In function ‘f’:
tst.c:5:1: error: unrecognizable insn:
5 | }
| ^
(insn 7 6 8 2 (parallel [
(set (reg:CCXV 100 %icc)
(compare:CCXV (plus:DI (reg:DI 113)
(const_int 4096 [0x1000]))
(unspec:DI [
(reg:DI 113)
(const_int 4096 [0x1000])
] UNSPEC_ADDV)))
(set (reg:DI 112)
(plus:DI (reg:DI 113)
(const_int 4096 [0x1000])))
]) "tst.c":4:12 -1
(nil))
during RTL pass: vregs
tst.c:5:1: internal compiler error: in extract_insn, at recog.c:2310
0xfffff80100bf2803 __libc_start_main
./csu/libc-start.c:308
Please submit a full bug report,
with preprocessed source if appropriate.
Please include the complete backtrace with any bug report.
See <file:///usr/share/doc/gcc-9/README.Bugs> for instructions.
ceres$
ceres$
ceres$ /usr/bin/gcc-10 -v -fsanitize=undefined -v -c tst.c
Using built-in specs.
COLLECT_GCC=/usr/bin/gcc-10
Target: sparc64-linux-gnu
Configured with: ../src/configure -v --with-pkgversion='Debian 10.2.0-17'
--with-bugurl=file:///usr/share/doc/gcc-10/README.Bugs
--enable-languages=c,ada,c++,go,d,fortran,objc,obj-c++,m2 --prefix=/usr
--with-gcc-major-version-only --program-suffix=-10
--program-prefix=sparc64-linux-gnu- --enable-shared --enable-linker-build-id
--libexecdir=/usr/lib --without-included-gettext --enable-threads=posix
--libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug
--enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new
--enable-gnu-unique-object --disable-libquadmath --disable-libquadmath-support
--enable-plugin --enable-default-pie --with-system-zlib --disable-libphobos
--enable-objc-gc=auto --enable-multiarch --disable-werror
--with-cpu-32=ultrasparc --enable-targets=all --with-long-double-128
--enable-multilib --enable-checking=release --build=sparc64-linux-gnu
--host=sparc64-linux-gnu --target=sparc64-linux-gnu
Thread model: posix
Supported LTO compression algorithms: zlib zstd
gcc version 10.2.0 (Debian 10.2.0-17)
COLLECT_GCC_OPTIONS='-v' '-fsanitize=undefined' '-v' '-c' '-mcpu=v9'
/usr/lib/gcc/sparc64-linux-gnu/10/cc1 -quiet -v -v -imultiarch
sparc64-linux-gnu -D__sparc_v9__ -D__arch64__ tst.c -quiet -dumpbase tst.c
-mcpu=v9 -auxbase tst -version -fsanitize=undefined -o
/var/tmp/dclarke/ccy8GBEV.s
GNU C17 (Debian 10.2.0-17) version 10.2.0 (sparc64-linux-gnu)
compiled by GNU C version 10.2.0, GMP version 6.2.0, MPFR version
4.1.0, MPC version 1.2.0, isl version isl-0.22.1-GMP
warning: GMP header version 6.2.0 differs from library version 6.2.1.
GGC heuristics: --param ggc-min-expand=97 --param ggc-min-heapsize=127207
ignoring nonexistent directory "/usr/local/include/sparc64-linux-gnu"
ignoring nonexistent directory
"/usr/lib/gcc/sparc64-linux-gnu/10/include-fixed"
ignoring nonexistent directory
"/usr/lib/gcc/sparc64-linux-gnu/10/../../../../sparc64-linux-gnu/include"
#include "..." search starts here:
#include <...> search starts here:
/usr/lib/gcc/sparc64-linux-gnu/10/include
/usr/local/include
/usr/include/sparc64-linux-gnu
/usr/include
End of search list.
GNU C17 (Debian 10.2.0-17) version 10.2.0 (sparc64-linux-gnu)
compiled by GNU C version 10.2.0, GMP version 6.2.0, MPFR version
4.1.0, MPC version 1.2.0, isl version isl-0.22.1-GMP
warning: GMP header version 6.2.0 differs from library version 6.2.1.
GGC heuristics: --param ggc-min-expand=97 --param ggc-min-heapsize=127207
Compiler executable checksum: 90178539ba1dc1edb30cf829faab698d
tst.c: In function ‘f’:
tst.c:5:1: error: unrecognizable insn:
5 | }
| ^
(insn 7 6 8 2 (parallel [
(set (reg:CCXV 100 %icc)
(compare:CCXV (plus:DI (reg:DI 113)
(const_int 4096 [0x1000]))
(unspec:DI [
(reg:DI 113)
(const_int 4096 [0x1000])
] UNSPEC_ADDV)))
(set (reg:DI 112)
(plus:DI (reg:DI 113)
(const_int 4096 [0x1000])))
]) "tst.c":4:12 -1
(nil))
during RTL pass: vregs
tst.c:5:1: internal compiler error: in extract_insn, at recog.c:2294
0xfffff80100dee803 __libc_start_main
./csu/libc-start.c:308
Please submit a full bug report,
with preprocessed source if appropriate.
Please include the complete backtrace with any bug report.
See <file:///usr/share/doc/gcc-10/README.Bugs> for instructions.
ceres$
So it looks like this bug has been around for years and strangely
I didn't see it back in 2018 on Solaris sparcv9. That is odd.
--
Dennis Clarke
RISC-V/SPARC/PPC/ARM/CISC
UNIX and Linux spoken
GreyBeard and suspenders optional
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Bug target/97939] ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs
2020-11-23 0:48 [Bug target/97939] New: ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs vincent-gcc at vinc17 dot net
` (3 preceding siblings ...)
2020-11-26 8:25 ` dclarke at blastwave dot org
@ 2020-11-27 7:55 ` dclarke at blastwave dot org
2020-11-27 9:08 ` ebotcazou at gcc dot gnu.org
` (6 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: dclarke at blastwave dot org @ 2020-11-27 7:55 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97939
--- Comment #5 from Dennis Clarke <dclarke at blastwave dot org> ---
Not sure how useful this is but all of the following toss the same ICE :
long f(long arg){return arg + 4096;}
long f(long arg){return arg - 4096;}
long f(long arg){return 4096 + arg;}
long f(long arg){return arg - 4096;}
However these work fine :
long f(long arg){return 4096 - arg;}
long f(long arg){return arg * 4096;}
long f(long arg){return 4096 * arg;}
long f(long arg){return arg / 4096;}
etc etc etc as well as other powers of 2.
very strange.
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Bug target/97939] ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs
2020-11-23 0:48 [Bug target/97939] New: ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs vincent-gcc at vinc17 dot net
` (4 preceding siblings ...)
2020-11-27 7:55 ` dclarke at blastwave dot org
@ 2020-11-27 9:08 ` ebotcazou at gcc dot gnu.org
2020-11-27 9:24 ` vincent-gcc at vinc17 dot net
` (5 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: ebotcazou at gcc dot gnu.org @ 2020-11-27 9:08 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97939
--- Comment #6 from Eric Botcazou <ebotcazou at gcc dot gnu.org> ---
> Not sure how useful this is but all of the following toss the same ICE :
>
> long f(long arg){return arg + 4096;}
>
> long f(long arg){return arg - 4096;}
>
> long f(long arg){return 4096 + arg;}
>
> long f(long arg){return arg - 4096;}
>
> However these work fine :
>
> long f(long arg){return 4096 - arg;}
>
> long f(long arg){return arg * 4096;}
>
> long f(long arg){return 4096 * arg;}
>
> long f(long arg){return arg / 4096;}
>
> etc etc etc as well as other powers of 2.
It's specific to 4096 and additive operations. A look at the assembly
generated for the first 4 without -fsanitize=undefined may give a hunch about
what happens.
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Bug target/97939] ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs
2020-11-23 0:48 [Bug target/97939] New: ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs vincent-gcc at vinc17 dot net
` (5 preceding siblings ...)
2020-11-27 9:08 ` ebotcazou at gcc dot gnu.org
@ 2020-11-27 9:24 ` vincent-gcc at vinc17 dot net
2020-11-27 9:45 ` vincent-gcc at vinc17 dot net
` (4 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: vincent-gcc at vinc17 dot net @ 2020-11-27 9:24 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97939
--- Comment #7 from Vincent Lefèvre <vincent-gcc at vinc17 dot net> ---
For i + 4095:
add %g1, 4095, %g1
For i + 4096:
sub %g1, -4096, %g1
For i + 4097:
sethi %hi(4195328), %g1
srlx %g1, 10, %g1
add %g2, %g1, %g1
SPARC can handle immediate signed constants directly up to 13 bits. For the
positive ones, that's up to 4095. If one wants to add 4096 or more, one has to
use sethi. But to add 4096, there is a specific optimization: subtract -4096,
since this constant fits in 13 bits (two's complement).
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Bug target/97939] ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs
2020-11-23 0:48 [Bug target/97939] New: ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs vincent-gcc at vinc17 dot net
` (6 preceding siblings ...)
2020-11-27 9:24 ` vincent-gcc at vinc17 dot net
@ 2020-11-27 9:45 ` vincent-gcc at vinc17 dot net
2020-11-28 12:02 ` cvs-commit at gcc dot gnu.org
` (3 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: vincent-gcc at vinc17 dot net @ 2020-11-27 9:45 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97939
--- Comment #8 from Vincent Lefèvre <vincent-gcc at vinc17 dot net> ---
But note that there is no issue with -fsanitize=undefined on
return i - (-4096);
So the cause is the transformation of i + 4096 to i - (-4096).
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Bug target/97939] ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs
2020-11-23 0:48 [Bug target/97939] New: ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs vincent-gcc at vinc17 dot net
` (7 preceding siblings ...)
2020-11-27 9:45 ` vincent-gcc at vinc17 dot net
@ 2020-11-28 12:02 ` cvs-commit at gcc dot gnu.org
2020-11-28 12:03 ` cvs-commit at gcc dot gnu.org
` (2 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2020-11-28 12:02 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97939
--- Comment #9 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Eric Botcazou <ebotcazou@gcc.gnu.org>:
https://gcc.gnu.org/g:c04bd12b06a21ad4a9c432c109ec2a543725ad1b
commit r11-5511-gc04bd12b06a21ad4a9c432c109ec2a543725ad1b
Author: Eric Botcazou <ebotcazou@adacore.com>
Date: Sat Nov 28 12:54:48 2020 +0100
Fix PR target/97939
The little dance around 4096 that add/sub instructions do on the SPARC
needs to be taken into account for the overflow arithmetic operations.
It cannot be done for unsigned overflow, but it can be done for signed
overflow.
gcc/ChangeLog:
PR target/97939
* config/sparc/predicates.md (arith_double_add_operand): Comment.
* config/sparc/sparc.md (uaddvdi4): Use arith_double_operand.
(addvdi4): Use arith_double_add_operand.
(addsi3): Remove useless attributes.
(addvsi4): Use arith_add_operand.
(*cmp_ccv_plus): Likewise and add second alternative accordingly.
(*cmp_ccxv_plus): Likewise.
(*cmp_ccv_plus_set): Likewise.
(*cmp_ccxv_plus_set): Likewise.
(*cmp_ccv_plus_sltu_set): Likewise.
(usubvdi4): Use arith_double_operand.
(subvdi4): Use arith_double_add_operand.
(subsi3): Remove useless attributes.
(subvsi4): Use arith_add_operand.
(*cmp_ccv_minus): Likewise and add second alternative accordingly.
(*cmp_ccxv_minus): Likewise.
(*cmp_ccv_minus_set): Likewise.
(*cmp_ccxv_minus_set): Likewise.
(*cmp_ccv_minus_sltu_set): Likewise.
(negsi2): Use register_operand.
(unegvsi3): Likewise.
(negvsi3) Likewise.
(*cmp_ccnz_neg): Likewise.
(*cmp_ccxnz_neg): Likewise.
(*cmp_ccnz_neg_set): Likewise.
(*cmp_ccxnz_neg_set): Likewise.
(*cmp_ccc_neg_set): Likewise.
(*cmp_ccxc_neg_set): Likewise.
(*cmp_ccc_neg_sltu_set): Likewise.
(*cmp_ccv_neg): Likewise.
(*cmp_ccxv_neg): Likewise.
(*cmp_ccv_neg_set): Likewise.
(*cmp_ccxv_neg_set): Likewise.
(*cmp_ccv_neg_sltu_set): Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/sparc/overflow-6.c: New test.
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Bug target/97939] ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs
2020-11-23 0:48 [Bug target/97939] New: ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs vincent-gcc at vinc17 dot net
` (8 preceding siblings ...)
2020-11-28 12:02 ` cvs-commit at gcc dot gnu.org
@ 2020-11-28 12:03 ` cvs-commit at gcc dot gnu.org
2020-11-28 12:03 ` cvs-commit at gcc dot gnu.org
2020-11-28 12:04 ` ebotcazou at gcc dot gnu.org
11 siblings, 0 replies; 13+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2020-11-28 12:03 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97939
--- Comment #10 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-10 branch has been updated by Eric Botcazou
<ebotcazou@gcc.gnu.org>:
https://gcc.gnu.org/g:25218e34136fb7f89dd1cbb72b2d920546031bfb
commit r10-9092-g25218e34136fb7f89dd1cbb72b2d920546031bfb
Author: Eric Botcazou <ebotcazou@adacore.com>
Date: Sat Nov 28 12:54:48 2020 +0100
Fix PR target/97939
The little dance around 4096 that add/sub instructions do on the SPARC
needs to be taken into account for the overflow arithmetic operations.
It cannot be done for unsigned overflow, but it can be done for signed
overflow.
gcc/ChangeLog:
PR target/97939
* config/sparc/predicates.md (arith_double_add_operand): Comment.
* config/sparc/sparc.md (uaddvdi4): Use arith_double_operand.
(addvdi4): Use arith_double_add_operand.
(addsi3): Remove useless attributes.
(addvsi4): Use arith_add_operand.
(*cmp_ccv_plus): Likewise and add second alternative accordingly.
(*cmp_ccxv_plus): Likewise.
(*cmp_ccv_plus_set): Likewise.
(*cmp_ccxv_plus_set): Likewise.
(*cmp_ccv_plus_sltu_set): Likewise.
(usubvdi4): Use arith_double_operand.
(subvdi4): Use arith_double_add_operand.
(subsi3): Remove useless attributes.
(subvsi4): Use arith_add_operand.
(*cmp_ccv_minus): Likewise and add second alternative accordingly.
(*cmp_ccxv_minus): Likewise.
(*cmp_ccv_minus_set): Likewise.
(*cmp_ccxv_minus_set): Likewise.
(*cmp_ccv_minus_sltu_set): Likewise.
(negsi2): Use register_operand.
(unegvsi3): Likewise.
(negvsi3) Likewise.
(*cmp_ccnz_neg): Likewise.
(*cmp_ccxnz_neg): Likewise.
(*cmp_ccnz_neg_set): Likewise.
(*cmp_ccxnz_neg_set): Likewise.
(*cmp_ccc_neg_set): Likewise.
(*cmp_ccxc_neg_set): Likewise.
(*cmp_ccc_neg_sltu_set): Likewise.
(*cmp_ccv_neg): Likewise.
(*cmp_ccxv_neg): Likewise.
(*cmp_ccv_neg_set): Likewise.
(*cmp_ccxv_neg_set): Likewise.
(*cmp_ccv_neg_sltu_set): Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/sparc/overflow-6.c: New test.
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Bug target/97939] ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs
2020-11-23 0:48 [Bug target/97939] New: ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs vincent-gcc at vinc17 dot net
` (9 preceding siblings ...)
2020-11-28 12:03 ` cvs-commit at gcc dot gnu.org
@ 2020-11-28 12:03 ` cvs-commit at gcc dot gnu.org
2020-11-28 12:04 ` ebotcazou at gcc dot gnu.org
11 siblings, 0 replies; 13+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2020-11-28 12:03 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97939
--- Comment #11 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-9 branch has been updated by Eric Botcazou
<ebotcazou@gcc.gnu.org>:
https://gcc.gnu.org/g:e6280f66297e5886a62dc5f1ae3c6b559868193b
commit r9-9078-ge6280f66297e5886a62dc5f1ae3c6b559868193b
Author: Eric Botcazou <ebotcazou@adacore.com>
Date: Sat Nov 28 12:54:48 2020 +0100
Fix PR target/97939
The little dance around 4096 that add/sub instructions do on the SPARC
needs to be taken into account for the overflow arithmetic operations.
It cannot be done for unsigned overflow, but it can be done for signed
overflow.
gcc/ChangeLog:
PR target/97939
* config/sparc/predicates.md (arith_double_add_operand): Comment.
* config/sparc/sparc.md (uaddvdi4): Use arith_double_operand.
(addvdi4): Use arith_double_add_operand.
(addsi3): Remove useless attributes.
(addvsi4): Use arith_add_operand.
(*cmp_ccv_plus): Likewise and add second alternative accordingly.
(*cmp_ccxv_plus): Likewise.
(*cmp_ccv_plus_set): Likewise.
(*cmp_ccxv_plus_set): Likewise.
(*cmp_ccv_plus_sltu_set): Likewise.
(usubvdi4): Use arith_double_operand.
(subvdi4): Use arith_double_add_operand.
(subsi3): Remove useless attributes.
(subvsi4): Use arith_add_operand.
(*cmp_ccv_minus): Likewise and add second alternative accordingly.
(*cmp_ccxv_minus): Likewise.
(*cmp_ccv_minus_set): Likewise.
(*cmp_ccxv_minus_set): Likewise.
(*cmp_ccv_minus_sltu_set): Likewise.
(negsi2): Use register_operand.
(unegvsi3): Likewise.
(negvsi3) Likewise.
(*cmp_ccnz_neg): Likewise.
(*cmp_ccxnz_neg): Likewise.
(*cmp_ccnz_neg_set): Likewise.
(*cmp_ccxnz_neg_set): Likewise.
(*cmp_ccc_neg_set): Likewise.
(*cmp_ccxc_neg_set): Likewise.
(*cmp_ccc_neg_sltu_set): Likewise.
(*cmp_ccv_neg): Likewise.
(*cmp_ccxv_neg): Likewise.
(*cmp_ccv_neg_set): Likewise.
(*cmp_ccxv_neg_set): Likewise.
(*cmp_ccv_neg_sltu_set): Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/sparc/overflow-6.c: New test.
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Bug target/97939] ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs
2020-11-23 0:48 [Bug target/97939] New: ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs vincent-gcc at vinc17 dot net
` (10 preceding siblings ...)
2020-11-28 12:03 ` cvs-commit at gcc dot gnu.org
@ 2020-11-28 12:04 ` ebotcazou at gcc dot gnu.org
11 siblings, 0 replies; 13+ messages in thread
From: ebotcazou at gcc dot gnu.org @ 2020-11-28 12:04 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97939
Eric Botcazou <ebotcazou at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Target Milestone|--- |9.4
Status|ASSIGNED |RESOLVED
Resolution|--- |FIXED
--- Comment #12 from Eric Botcazou <ebotcazou at gcc dot gnu.org> ---
Thanks for reporting the problem.
^ permalink raw reply [flat|nested] 13+ messages in thread
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