From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id D60A238708DA; Mon, 23 Nov 2020 17:58:46 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D60A238708DA From: "denis.campredon at gmail dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug tree-optimization/97961] New: unnecessary moves with __builtin_{add,sub}_overflow_p and __int128 Date: Mon, 23 Nov 2020 17:58:46 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: new X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: tree-optimization X-Bugzilla-Version: 11.0 X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: denis.campredon at gmail dot com X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: bug_id short_desc product version bug_status bug_severity priority component assigned_to reporter target_milestone Message-ID: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 23 Nov 2020 17:58:46 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D97961 Bug ID: 97961 Summary: unnecessary moves with __builtin_{add,sub}_overflow_p and __int128 Product: gcc Version: 11.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: denis.campredon at gmail dot com Target Milestone: --- In #97950 Jackub told me to open a new bug for that. The snippet bellow has the following problems - f1 and f2 generate 4 unnecessary moves mov r9, rdi mov r8, rsi mov rsi, r9 mov rdi, r8 - f4 has "only" 2 unnecessary moves mov r9, rdi mov rdi, rsi - f3 should be identical to f4 except for the flag checking. ------------ bool f1(unsigned __int128 a,unsigned __int128 b) { return __builtin_add_overflow_p(a, b, (unsigned __int128)0); } bool f2(__int128 a,__int128 b) { return __builtin_add_overflow_p(a, b, (__int128)0); } bool f3(unsigned __int128 a,unsigned __int128 b) { return __builtin_sub_overflow_p(a, b, (unsigned __int128)0); } bool f4(__int128 a,__int128 b) { return __builtin_sub_overflow_p(a, b, (__int128)0); } ------------ asm generated ------------ f1(unsigned __int128, unsigned __int128): mov r9, rdi mov r8, rsi mov rsi, r9 mov rdi, r8 add rsi, rdx adc rdi, rcx setc al ret f2(__int128, __int128): mov r9, rdi mov r8, rsi mov rsi, r9 mov rdi, r8 add rsi, rdx adc rdi, rcx seto al ret f3(unsigned __int128, unsigned __int128): mov r9, rdi mov r8, rsi mov rdi, r8 mov rax, r9 mov r8, rdx sub rax, r8 mov rdx, rdi sbb rdx, rcx cmp r9, rax mov rcx, rdi sbb rcx, rdx setc al ret f4(__int128, __int128): mov r9, rdi mov rdi, rsi cmp r9, rdx sbb rdi, rcx seto al ret -------------------=