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* [Bug target/98248] New: [11 Regression] SVE: Wrong code with -O3 -msve-vector-bits=256
@ 2020-12-11 18:22 acoplan at gcc dot gnu.org
2020-12-11 18:23 ` [Bug target/98248] " acoplan at gcc dot gnu.org
2020-12-30 17:44 ` rsandifo at gcc dot gnu.org
0 siblings, 2 replies; 3+ messages in thread
From: acoplan at gcc dot gnu.org @ 2020-12-11 18:22 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98248
Bug ID: 98248
Summary: [11 Regression] SVE: Wrong code with -O3
-msve-vector-bits=256
Product: gcc
Version: 11.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: acoplan at gcc dot gnu.org
Target Milestone: ---
AArch64 GCC miscompiles the following testcase:
unsigned long long b;
_Bool a;
unsigned char c[3][22];
unsigned char (*h)[22] = c;
int j;
void aa(unsigned long long *n, int o) { *n ^= o; }
int main() {
for (long e = 0; e < 3; ++e)
for (long d = 0; d < 22; ++d)
c[e][d] = 7;
for (int d = 0; d < 2; d += 4)
for (char g = 0; g < 14; g += 4)
for (int i = 0; i < 12; i += 1)
if (~j)
a = h[d][4];
aa(&b, a);
if (b != 1)
__builtin_abort();
}
at -O3 -march=armv8.2-a+sve -msve-vector-bits=256 since
r11-4912-g46c705e70e078f6a1920d92e49042125d5e18495.
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2020-12-11 18:22 [Bug target/98248] New: [11 Regression] SVE: Wrong code with -O3 -msve-vector-bits=256 acoplan at gcc dot gnu.org
2020-12-11 18:23 ` [Bug target/98248] " acoplan at gcc dot gnu.org
2020-12-30 17:44 ` rsandifo at gcc dot gnu.org
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