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From: "jcmvbkbc at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/98470] ICE: "error: insn does not satisfy its
 constraints" with hard FP on xtensa
Date: Tue, 29 Dec 2020 05:18:18 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D98470

--- Comment #1 from jcmvbkbc at gcc dot gnu.org ---
It happens at the reload pass when reload transforms the following RTL that
comes to it from the IRA pass:

(insn 20 163 164 30 (set (reg:SF 162 [ iftmp.0_87 ])
        (mem/u/c:SF (symbol_ref/u:SI ("*.LC0") [flags 0x2]) [0  S4 A32]))
"float-ice.c":11:17 45 {movsf_internal}
     (expr_list:REG_EQUIV (mem/u/c:SF (symbol_ref/u:SI ("*.LC0") [flags 0x2=
])
[0  S4 A32])
        (nil)))
...
(insn 538 168 169 32 (set (reg:SF 71 [ iftmp.0_87 ])
        (reg:SF 162 [ iftmp.0_87 ])) "float-ice.c":11:17 45 {movsf_internal}
     (nil))

to the following RTL:

(insn 538 168 169 32 (set (reg:SF 19 f0 [orig:71 iftmp.0_87 ] [71])
        (mem/u/c:SF (symbol_ref/u:SI ("*.LC0") [flags 0x2]) [0  S4 A32]))
"float-ice.c":11:17 45 {movsf_internal}
     (nil))

which tries to load a literal into a hardware FP register. There's no opcode
for it in the xtensa ISA, there's no constraint that would match it in the
movsf_internal and the predicate in this instruction definition evaluates to
false on such input, but the substitution happens anyway.=