From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 168D0389367B; Tue, 5 Jan 2021 14:08:30 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 168D0389367B From: "ktkachov at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/98532] New: Use load/store pairs for 2-element vector in memory permutes Date: Tue, 05 Jan 2021 14:08:29 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: new X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: unknown X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: normal X-Bugzilla-Who: ktkachov at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: bug_id short_desc product version bug_status keywords bug_severity priority component assigned_to reporter target_milestone cf_gcctarget Message-ID: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 05 Jan 2021 14:08:30 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D98532 Bug ID: 98532 Summary: Use load/store pairs for 2-element vector in memory permutes Product: gcc Version: unknown Status: UNCONFIRMED Keywords: missed-optimization Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- Target: aarch64 I've seen these patterns while looking at some disassemblies but I believe = it can be reproduced in C with: typedef long v2di __attribute__((vector_size (16))); void foo (v2di *a, v2di *b) { v2di tmp =3D {(*a)[1], (*a)[0]}; *b =3D tmp; } This, for aarch64 -O2 generates: foo: ldr d0, [x0, 8] ld1 {v0.d}[1], [x0] str q0, [x1] ret clang does: foo: // @foo ldr q0, [x0] ext v0.16b, v0.16b, v0.16b, #8 str q0, [x1] ret I suspect we can do better in these cases with: ldp x2, x3, [x0] stp x3, x2, [x1] or something similar. In the combine phase we already try and fail to match: Failed to match this instruction: (set (reg:V2DI 97 [ tmp ]) (vec_concat:V2DI (mem/j:DI (plus:DI (reg/v/f:DI 95 [ a ]) (const_int 8 [0x8])) [1 BIT_FIELD_REF <*a_4(D), 64, 64>+0 S8 A64]) (mem/j:DI (reg/v/f:DI 95 [ a ]) [1 BIT_FIELD_REF <*a_4(D), 64, 0>+0= S8 A128]))) so maybe we can solve this purely in the backend?=