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From: "acoplan at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug rtl-optimization/98601] [8/9/10/11 Regression] aarch64: ICE in
 rtx_addr_can_trap_p_1, at rtlanal.c:467
Date: Wed, 31 Mar 2021 12:51:13 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D98601

Alex Coplan <acoplan at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
     Ever confirmed|0                           |1
   Last reconfirmed|                            |2021-03-31
           Keywords|                            |ice-on-valid-code

--- Comment #4 from Alex Coplan <acoplan at gcc dot gnu.org> ---
richi: thanks for the pointers. I agree it looks like this should be valid.
E.g. the very reasonable:

void foo(void *p)
{
    asm volatile ("str xzr, %0" : "=3DQ"(*p));
}

gives:

foo:
        str xzr, [x0]
        ret

at -O2 on AArch64. (Dropping the volatile in this case reproduce the ICE.)

I bisected the ICE to r8-7484-g532c7a45847f3401e26fa2f07e52613891c80718:

commit 532c7a45847f3401e26fa2f07e52613891c80718
Author: Jakub Jelinek <jakub@redhat.com>
Date:   Fri Mar 23 20:55:40 2018

    re PR inline-asm/85022 (internal compiler error: in write_dependence_p,=
 at
alias.c:3003)

            PR inline-asm/85022
            * emit-rtl.c (init_emit_regs): Indicate that VOIDmode MEMs don't
have
            known size by default.=