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From: "crazylht at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug tree-optimization/98694] GCC produces incorrect code for loops
 with -O3 for skylake-avx512 and icelake-server
Date: Fri, 15 Jan 2021 08:11:18 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D98694

--- Comment #1 from Hongtao.liu <crazylht at gmail dot com> ---
cprop hardreg change

(insn 457 499 460 33 (set (reg:SI 39 r11 [orig:86 _11 ] [86])
        (reg:SI 37 r9 [orig:86 _11 ] [86])) "test.c":29:36 75 {*movsi_inter=
nal}
     (expr_list:REG_DEAD (reg:SI 37 r9 [orig:86 _11 ] [86])
        (nil)))

to

(insn 457 499 460 33 (set (reg:SI 39 r11 [orig:86 _11 ] [86])
        (reg:SI 22 xmm2 [orig:86 _11 ] [86])) "test.c":29:36 75
{*movsi_internal}
     (expr_list:REG_DEAD (reg:SI 22 xmm2 [orig:86 _11 ] [86])
        (nil)))

since it thought the lower 32bit of r9 and xmm2 is the same?

but with xmm2 defined as

        kmovw   %k0, %edi       # 69    [c=3D4 l=3D4]  *movhi_internal/6
        kmovd   %k0, %edx       # 487   [c=3D4 l=3D3]  *movsi_internal/16
        vmovd   %edi, %xmm2     # 489

the bit16-32 is clear with kmovw(note k0 is equal to r9 with SImode, it's v=
ar_6
in source code)

(insn 69 68 70 12 (set (reg:HI 5 di [orig:96 _52 ] [96])
        (reg:HI 68 k0 [orig:82 var_6.0_1 ] [82])) "test.c":21:23 76
{*movhi_internal}
     (nil))

(insn 489 75 78 12 (set (reg:SI 22 xmm2 [297])
        (reg:SI 5 di [orig:96 _52 ] [96])) 75 {*movsi_internal}
     (nil))=