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From: "crazylht at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/98694] [11 Regression] GCC produces incorrect code for
 loops with -O3 for skylake-avx512 and icelake-server
Date: Fri, 15 Jan 2021 17:33:05 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D98694

--- Comment #6 from Hongtao.liu <crazylht at gmail dot com> ---
(In reply to Hongtao.liu from comment #5)
> and rewritten pattern
> (define_insn "*vec_dupv4hi"
>   [(set (match_operand:V4HI 0 "register_operand" "=3Dy,xYw")
>         (vec_duplicate:V4HI
>           (truncate:HI
>             (match_operand:SI 1 "register_operand" "0,xYw"))))]
> to=20
>=20
> (define_insn "*vec_dupv4hi"
>   [(set (match_operand:V4HI 0 "register_operand" "=3Dy,xYw")
>         (vec_duplicate:V4HI
>           (vecTselect:HI
>             (match_operand:V4HI 1 "register_operand" "0,xYw")
>             (parallel [(const_int 0)]))))]
>=20
> could avoid this issue.

Oh, not workable.
---
  if (MAYBE_SSE_CLASS_P (regclass) || MAYBE_MMX_CLASS_P (regclass))
    {
      /* Vector registers do not support QI or HImode loads.  If we don't
         disallow a change to these modes, reload will assume it's ok to
         drop the subreg from (subreg:SI (reg:HI 100) 0).  This affects
         the vec_dupv4hi pattern.  */
      if (GET_MODE_SIZE (from) < 4)
        return
---=