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From: "jeffhurchalla at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug middle-end/98801] Request for a conditional move built-in function
Date: Tue, 26 Jan 2021 00:17:09 +0000	[thread overview]
Message-ID: <bug-98801-4-Pw6cdYadSm@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-98801-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98801

--- Comment #6 from Jeff Hurchalla <jeffhurchalla at gmail dot com> ---
I'd be quite satisfied with the simpler option that Peter Cordes wrote:

> a non-memory conditional-select builtin that exposes the much more widely
> available ALU conditional-select functionality like x86 CMOV, AArch64 CSEL,
> MIPS MVN, etc.
...
> The ALU-select part can be emulated with AND/OR, so that's something we can
> provide on any target.

A predicated reg-reg move like this is appealing to me for my needs.  It seems
common in ISAs and emulatable when not present.

I perceive that the security use-case for cmovs could be more important than my
motivation for them (my motivation: performance in critical loops containing
unpredictable conditionals).  I suspect the guarantees needed for security
would satisfy me despite having a different motivation.

  parent reply	other threads:[~2021-01-26  0:17 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-23  4:47 [Bug c++/98801] New: " jeffhurchalla at gmail dot com
2021-01-23  6:53 ` [Bug c++/98801] " pinskia at gcc dot gnu.org
2021-01-23 19:37 ` jeffhurchalla at gmail dot com
2021-01-23 20:28 ` jeffhurchalla at gmail dot com
2021-01-25  9:36 ` [Bug middle-end/98801] " rguenth at gcc dot gnu.org
2021-01-25 19:19 ` peter at cordes dot ca
2021-01-26  0:17 ` jeffhurchalla at gmail dot com [this message]
2021-01-27  5:18 ` jeffhurchalla at gmail dot com
2023-05-27 17:56 ` richard.yao at alumni dot stonybrook.edu

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