From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 25039386F011; Wed, 27 Jan 2021 13:28:24 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 25039386F011 From: "jakub at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/98849] [11 Regression] ICE in expand_shift_1, at expmed.c:2658 since g:7432f255b70811dafaf325d9403 Date: Wed, 27 Jan 2021 13:28:23 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 11.0 X-Bugzilla-Keywords: ice-on-valid-code X-Bugzilla-Severity: normal X-Bugzilla-Who: jakub at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 11.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: cc Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 27 Jan 2021 13:28:24 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D98849 Jakub Jelinek changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |ktkachov at gcc dot gnu.or= g, | |rearnsha at gcc dot gnu.org --- Comment #4 from Jakub Jelinek --- Ah, so on powerpc64le this works fine, expand_binop has: 1558 /* If this is a vector shift by a scalar, see if we can do a vect= or 1559 shift by a vector. If so, broadcast the scalar into a vector.= */ 1560 if (mclass =3D=3D MODE_VECTOR_INT) 1561 { 1562 optab otheroptab =3D unknown_optab; 1563=20=20=20=20 1564 if (binoptab =3D=3D ashl_optab) 1565 otheroptab =3D vashl_optab; 1566 else if (binoptab =3D=3D ashr_optab) 1567 otheroptab =3D vashr_optab; 1568 else if (binoptab =3D=3D lshr_optab) 1569 otheroptab =3D vlshr_optab; 1570 else if (binoptab =3D=3D rotl_optab) 1571 otheroptab =3D vrotl_optab; 1572 else if (binoptab =3D=3D rotr_optab) 1573 otheroptab =3D vrotr_optab; 1574=20=20=20=20 1575 if (otheroptab 1576 && (icode =3D optab_handler (otheroptab, mode)) !=3D CODE_FOR_nothing) 1577 { 1578 /* The scalar may have been extended to be too wide.=20 Truncate 1579 it back to the proper size to fit in the broadcast vec= tor. */ 1580 scalar_mode inner_mode =3D GET_MODE_INNER (mode); 1581 if (!CONST_INT_P (op1) 1582 && (GET_MODE_BITSIZE (as_a (GET_MODE (op1))) 1583 > GET_MODE_BITSIZE (inner_mode))) 1584 op1 =3D force_reg (inner_mode, 1585 simplify_gen_unary (TRUNCATE, inner_mo= de, op1, 1586 GET_MODE (op1))); 1587 rtx vop1 =3D expand_vector_broadcast (mode, op1); 1588 if (vop1) 1589 { 1590 temp =3D expand_binop_directly (icode, mode, otheropt= ab, op0, vop1, 1591 target, unsignedp, meth= ods, last); 1592 if (temp) (gdb)=20 1593 return temp; 1594 } 1595 } 1596 } code for this. It doesn't work in the ARM case, because it doesn't support either vec_duplicate_optab nor vec_init_optab for the mode. I'm declaring this a backend bug, it shouldn't advertise such vector shifts= in configurations in which it can't even init such vectors.=