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From: "david at westcontrol dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/98884] Implement empty struct optimisations on ARM
Date: Mon, 01 Feb 2021 15:46:59 +0000 [thread overview]
Message-ID: <bug-98884-4-JfwoBflx7J@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-98884-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98884
--- Comment #6 from David Brown <david at westcontrol dot com> ---
(In reply to Jakub Jelinek from comment #3)
> If GCC and Clang are ABI incompatible on this, then one of the two compilers
> is buggy. So, it is needed to look at the EABI and find out which case it
> is.
I've had a look at the ARM C++ ABI, to the best of my abilities:
<https://developer.arm.com/documentation/ihi0041/latest>
Section 4.1 has this to say:
GC++ABI §2.27POD Data Types
The GC++ABI defines the way in which empty class types are laid out. For the
purposes of parameter passing in [AAPCS], a parameter whose type is an empty
class shall be treated as if its type were an aggregate with a single member of
type unsigned byte.
Note: Of course, the single member has undefined content.
(This references <http://itanium-cxx-abi.github.io/cxx-abi/abi.html#pod>)
If my reading is correct, then gcc is correct and clang is wrong here - empty
classes are treated as containing a single unsigned byte, and then expanded to
a 32-bit type before passing. (There is still no need to put a zero in these
parameters, as the value is unspecified.)
It may be that the x86 gcc port is wrong here, but I haven't looked at the
details of x86 calling conventions.
I hope someone can check this out, and a perhaps file a bug report for clang so
that they can correct it. (Alternatively, file a bug report with ARM so that
they can change the ABI!)
However, in this particular case, if clang is wrong then I don't want to be
right. I can see no benefit, and significant cost, in passing zeros for these
empty tag structs. I'd be quite happy with an explicitly non-conforming switch
to enable such optimisations (just like "-fshort-enums" or other switches that
mess with caller and callee registers). Or I'd be even happier to find that
clang is wrong and gcc ARM gets optimised without a flag :-)
next prev parent reply other threads:[~2021-02-01 15:46 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-29 11:18 [Bug c++/98884] New: " david at westcontrol dot com
2021-01-29 11:43 ` [Bug target/98884] " redi at gcc dot gnu.org
2021-01-29 11:55 ` rguenth at gcc dot gnu.org
2021-01-29 12:30 ` david at westcontrol dot com
2021-01-29 12:35 ` jakub at gcc dot gnu.org
2021-01-29 12:48 ` jakub at gcc dot gnu.org
2021-02-01 15:18 ` david at westcontrol dot com
2021-02-01 15:46 ` david at westcontrol dot com [this message]
2021-02-01 16:34 ` jakub at gcc dot gnu.org
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