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Subject: [Bug ada/98996] [11 Regression] mips64 ada ftbfs
Date: Fri, 26 Feb 2021 02:56:19 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D98996

--- Comment #4 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Jeff Law <law@gcc.gnu.org>:

https://gcc.gnu.org/g:9967bbfceddce755b18bdbecc6d0c56e994a05cc

commit r11-7413-g9967bbfceddce755b18bdbecc6d0c56e994a05cc
Author: YunQiang Su <yunqiang.su@cipunited.com>
Date:   Thu Feb 25 19:55:10 2021 -0700

    [PATCH v4 1/2] MIPS: unaligned load: use SImode for SUBREG if OK (PR989=
96)
[PATCH v4 2/2] ada: add 128bit operation for MIPS N32 and N64

    gcc/ChangeLog:

            PR target/98996
            * config/mips/mips.c (mips_expand_ext_as_unaligned_load):
            If TARGET_64BIT and dest is SUBREG, we check the width, if it
            equal to SImode, we use SImode operation, just like what we are
            doing for REG one.

    gcc/ada/ChangeLog:

            PR ada/98996
            * Makefile.rtl: <mips*-*-linux*>
            add 128Bit operation file for MIPS N64 and N32 to
            LIBGNAT_TARGET_PAIRS and EXTRA_GNATRTL_NONTASKING_OBJS=