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From: "pipcet at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug rtl-optimization/99114] [WORD_REGISTER_OPERATIONS] wrong code
 for (u16_var & 3) == (u32)1
Date: Tue, 16 Feb 2021 18:30:57 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D99114

--- Comment #6 from pipcet at gmail dot com ---
Created attachment 50204
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=3D50204&action=3Dedit
RTL dump of combine pass

(Gzipped because of the file size limit).

The relevant section is around this code:

(note 4724 4779 4727 667 [bb 667] NOTE_INSN_BASIC_BLOCK)
(note 4727 4724 4728 667 NOTE_INSN_DELETED)
(note 4728 4727 4729 667 NOTE_INSN_DELETED)
(jump_insn 4729 4728 4730 667 (set (pc)
        (if_then_else (gtu (subreg:SI (reg:HI 799 [ hrsi$word_no ]) 0)
                (const_int 1 [0x1]))
            (label_ref 4783)
            (pc))) "../../../src/gcc/gcc/hard-reg-set.h":311:7 20 {*cbranch=
si4}
     (int_list:REG_BR_PROB 39298956 (nil))
 -> 4783)


allowing combination of insns 4727 and 4728
original costs 4 + 4 =3D 8
replacement cost 4
deferring deletion of insn with uid =3D 4727.
modifying insn i3  4728: r2326:SI=3Dr799:HI#0&0x3
deferring rescan insn with uid =3D 4728.
allowing combination of insns 4728 and 4729
original costs 4 + 4 =3D 8
replacement cost 4
deferring deletion of insn with uid =3D 4728.
modifying insn i3  4729: pc=3D{(gtu(r799:HI#0,0x1))?L4783:pc}
      REG_BR_PROB 39298956
deferring rescan insn with uid =3D 4729.=