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From: "ebotcazou at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug rtl-optimization/99114] [WORD_REGISTER_OPERATIONS] wrong code
 for (u16_var & 3) == (u32)1
Date: Mon, 15 Feb 2021 22:03:26 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D99114

Eric Botcazou <ebotcazou at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |WAITING
                 CC|                            |ebotcazou at gcc dot gnu.o=
rg
     Ever confirmed|0                           |1
   Last reconfirmed|                            |2021-02-15

--- Comment #1 from Eric Botcazou <ebotcazou at gcc dot gnu.org> ---
Please provide a reproducer as documented in https://gcc.gnu.org/bugs

> The assumption here is that op0 will be an (and:HI) after the first
> statement (and we assume (subreg:SI (and:HI ... (const_int 3))) is
> defined because of WORD_REGISTER_OPERATIONS) but it's actually
> simplified to be just the (reg:HI 593), and (subreg:SI (reg:HI 593))
> is not defined.

Paradoxical registers are defined under specific circumstances though.

> I'm unsure whether this can cause wrong code for in-tree backends or
> backends which don't define WORD_REGISTER_OPERATIONS.

Well, obviously not for the latter, see the comment just above the code.=