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Subject: [Bug target/99271] [10/11 regression] Wrong code for Arm-v8-m.main
 CMSE calling __gnu_cmse_nonsecure_call
Date: Thu, 25 Feb 2021 17:17:48 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D99271

--- Comment #1 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Richard Earnshaw <rearnsha@gcc.gnu.or=
g>:

https://gcc.gnu.org/g:44ab1cc1df6ec4ff50210401acdcb26e80343541

commit r11-7400-g44ab1cc1df6ec4ff50210401acdcb26e80343541
Author: Richard Earnshaw <rearnsha@arm.com>
Date:   Mon Feb 22 15:00:53 2021 +0000

    arm: force use of r4 for __gnu_cmse_nonsecure_call when !FPCXT [PR99271]

    Commit r10-6017 relaxed the constraint on thumb2 calls to
    __gnu_cmse_nonsecure_call to allow any register for the call address.
    Although the initial code expansion continues to use r4 with the FPCXT
    extension is not enabled, the change was unsafe because subsequent
    optimizations could use the additional freedom to change which
    register was being used.

    To fix this we need to split the output patterns in the machine
    description to use distinct recognizers: one with the additional
    freedom when FPCXT is enabled an another that retains the original
    restrictions when the extension is not available.

    gcc:
            PR target/99271
            * config/arm/thumb2.md (nonsecure_call_reg_thumb2_fpcxt): New
pattern.
            (nonsecure_call_value_reg_thumb2_fpcxt): Likewise.
            (nonsecure_call_reg_thumb2): Restrict to using r4 for the callee
            address and disable when the FPCXT is not available.
            (nonsecure_call_value_reg_thumb2): Likewise.

    gcc/testsuite:
            * gcc.target/arm/cmse/cmse-18.c: New test.=