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Subject: [Bug target/99321] [11 Regression] ICE: in extract_constrain_insn,
 at recog.c:2670: insn does not satisfy its constraints: {*uminv16qi3} since
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Date: Sun, 07 Mar 2021 09:30:17 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D99321

--- Comment #8 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Jakub Jelinek <jakub@gcc.gnu.org>:

https://gcc.gnu.org/g:a18ebd6c439227b048a91fbfa66f5983f884c157

commit r11-7548-ga18ebd6c439227b048a91fbfa66f5983f884c157
Author: Jakub Jelinek <jakub@redhat.com>
Date:   Sun Mar 7 10:27:28 2021 +0100

    i386: Fix some -mavx512vl -mno-avx512bw bugs [PR99321]

    As I wrote in the mail with the previous PR99321 fix, we have various
    bugs where we emit instructions that need avx512bw and avx512vl
    ISAs when compiling with -mavx512vl -mno-avx512bw.

    Without the following patch, the attached testcase fails with:
    /tmp/ccW4PsfG.s: Assembler messages:
    /tmp/ccW4PsfG.s:9: Error: unsupported instruction `vpaddb'
    /tmp/ccW4PsfG.s:20: Error: unsupported instruction `vpaddb'
    /tmp/ccW4PsfG.s:31: Error: unsupported instruction `vpaddw'
    /tmp/ccW4PsfG.s:42: Error: unsupported instruction `vpaddw'
    /tmp/ccW4PsfG.s:53: Error: unsupported instruction `vpsubb'
    /tmp/ccW4PsfG.s:64: Error: unsupported instruction `vpsubb'
    /tmp/ccW4PsfG.s:75: Error: unsupported instruction `vpsubw'
    /tmp/ccW4PsfG.s:86: Error: unsupported instruction `vpsubw'
    /tmp/ccW4PsfG.s:97: Error: unsupported instruction `vpmullw'
    /tmp/ccW4PsfG.s:108: Error: unsupported instruction `vpmullw'
    /tmp/ccW4PsfG.s:133: Error: unsupported instruction `vpminub'
    /tmp/ccW4PsfG.s:144: Error: unsupported instruction `vpminuw'
    /tmp/ccW4PsfG.s:155: Error: unsupported instruction `vpminuw'
    /tmp/ccW4PsfG.s:166: Error: unsupported instruction `vpminsb'
    /tmp/ccW4PsfG.s:177: Error: unsupported instruction `vpminsb'
    /tmp/ccW4PsfG.s:202: Error: unsupported instruction `vpminsw'
    /tmp/ccW4PsfG.s:227: Error: unsupported instruction `vpmaxub'
    /tmp/ccW4PsfG.s:238: Error: unsupported instruction `vpmaxuw'
    /tmp/ccW4PsfG.s:249: Error: unsupported instruction `vpmaxuw'
    /tmp/ccW4PsfG.s:260: Error: unsupported instruction `vpmaxsb'
    /tmp/ccW4PsfG.s:271: Error: unsupported instruction `vpmaxsb'
    /tmp/ccW4PsfG.s:296: Error: unsupported instruction `vpmaxsw'

    We already have Yw constraint which is equivalent to v for
    -mavx512bw -mavx512vl and to nothing otherwise, per discussions
    this patch changes it to stand for x otherwise.  As it is an
    undocumented internal constraint, hopefully it won't affect
    any inline asm in the wild.
    For the instructions that need both we need to use Yw and
    v for modes that don't need that.

    2021-03-07  Jakub Jelinek  <jakub@redhat.com>

            PR target/99321
            * config/i386/constraints.md (Yw): Use SSE_REGS if TARGET_SSE
            but TARGET_AVX512BW or TARGET_AVX512VL is not set.  Adjust
description
            and comment.
            * config/i386/sse.md (v_Yw): New define_mode_attr.
            (*<insn><mode>3, *mul<mode>3<mask_name>, *avx2_<code><mode>3,
            *sse4_1_<code><mode>3<mask_name>): Use <v_Yw> instead of v
            in constraints.
            * config/i386/mmx.md (mmx_pshufw_1, *vec_dupv4hi): Use Yw inste=
ad
of
            xYw in constraints.

            * lib/target-supports.exp
            (check_effective_target_assembler_march_noavx512bw): New effect=
ive
            target.
            * gcc.target/i386/avx512vl-pr99321-1.c: New test.=