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From: "ubizjak at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/99405] Rotate with mask not optimized on x86 for QI/HImode rotates
Date: Fri, 05 Mar 2021 12:59:20 +0000 [thread overview]
Message-ID: <bug-99405-4-iwtdBsPCF4@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-99405-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99405
--- Comment #2 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Jakub Jelinek from comment #1)
> Created attachment 50306 [details]
> gcc11-pr99405.patch
>
> Untested fix.
- (match_operand:SI 2 "register_operand" "c")
+ (match_operand:SI 2 "register_operand")
The constraint is here on purpose, you are risking reload failures with
compound instruction without it. IIRC from discussion with Segher, the combine
pass shouldn't propagate hard registers around anymore, but it can still
happen. So, if there is no compelling reason, I'd suggest to leave the
constraint.
next prev parent reply other threads:[~2021-03-05 12:59 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-05 12:38 [Bug target/99405] New: " jakub at gcc dot gnu.org
2021-03-05 12:43 ` [Bug target/99405] " jakub at gcc dot gnu.org
2021-03-05 12:59 ` ubizjak at gmail dot com [this message]
2021-03-05 13:03 ` jakub at gcc dot gnu.org
2021-03-05 14:55 ` unlvsur at live dot com
2021-03-05 14:59 ` jakub at gcc dot gnu.org
2021-03-05 15:06 ` unlvsur at live dot com
2021-03-06 10:13 ` jakub at gcc dot gnu.org
2021-04-27 8:18 ` cvs-commit at gcc dot gnu.org
2022-05-27 18:43 ` roger at nextmovesoftware dot com
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