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From: "jakub at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug c/99591] Improving __builtin_add_overflow performance on x86-64 Date: Wed, 01 Sep 2021 08:16:16 +0000 [thread overview] Message-ID: <bug-99591-4-D1bda0iWXV@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-99591-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99591 Jakub Jelinek <jakub at gcc dot gnu.org> changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |jakub at gcc dot gnu.org --- Comment #5 from Jakub Jelinek <jakub at gcc dot gnu.org> --- But the user could have written: int signed1_overflow (signed char a, signed char b) { signed char r; return __builtin_add_overflow (a, b, &r); } int signed2_overflow (short a, short b) { short r; return __builtin_add_overflow (a, b, &r); } int signed3_overflow (signed char a, signed char b) { signed char r; return __builtin_add_overflow ((int) a, (int) b, &r); } int signed4_overflow (short a, short b) { short r; return __builtin_add_overflow ((int) a, (int) b, &r); } and then the latter two functions behave the same in C and C++. So, I think it would be better to optimize this at the RTL level (only when we've decided what exact operation we are using), but then I think the problem is that this kind of thing is optimized usually by combine which doesn't trigger as the registers have multiple uses: (insn 9 6 10 2 (set (reg:SI 92) (sign_extend:SI (reg/v:QI 88 [ a ]))) "pr99591.c":16:33 151 {extendqisi2} (nil)) (insn 10 9 11 2 (set (reg:SI 93) (sign_extend:SI (reg/v:QI 90 [ b ]))) "pr99591.c":16:33 151 {extendqisi2} (nil)) (insn 11 10 12 2 (set (reg:QI 86 [ _6+1 ]) (const_int 0 [0])) "pr99591.c":16:33 77 {*movqi_internal} (nil)) (insn 12 11 13 2 (parallel [ (set (reg:CCO 17 flags) (eq:CCO (plus:HI (sign_extend:HI (subreg:QI (reg:SI 92) 0)) (sign_extend:HI (subreg:QI (reg:SI 93) 0))) (sign_extend:HI (plus:QI (subreg:QI (reg:SI 92) 0) (subreg:QI (reg:SI 93) 0))))) (set (reg:QI 94) (plus:QI (subreg:QI (reg:SI 92) 0) (subreg:QI (reg:SI 93) 0))) ]) "pr99591.c":16:33 238 {*addvqi4} (nil)) all in the same insn, but still multiple uses. Another option is some gimple optimization, see the arguments are promoted and repeat part of the expand_arith_overflow analysis and demote the arguments if possible. Or maybe just demote always and let expand_arith_overflow promote again if needed?
next prev parent reply other threads:[~2021-09-01 8:16 UTC|newest] Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-03-15 8:46 [Bug target/99591] New: " eggert at gnu dot org 2021-09-01 5:30 ` [Bug target/99591] " pinskia at gcc dot gnu.org 2021-09-01 5:32 ` pinskia at gcc dot gnu.org 2021-09-01 7:44 ` eggert at cs dot ucla.edu 2021-09-01 7:57 ` [Bug c/99591] " pinskia at gcc dot gnu.org 2021-09-01 8:16 ` jakub at gcc dot gnu.org [this message] 2021-09-01 8:53 ` [Bug tree-optimization/99591] " jakub at gcc dot gnu.org 2021-09-02 9:26 ` cvs-commit at gcc dot gnu.org 2021-09-02 9:29 ` jakub at gcc dot gnu.org
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