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Subject: [Bug target/99702] [11 Regression] ICE: RTL check: expected code
 'const_int', have 'subreg' in riscv_expand_block_move, at
 config/riscv/riscv.c:3262 with memcpy() since
 g:d9f0ade001533c9544bf2153b6baa8844ec0bee4
Date: Mon, 22 Mar 2021 10:07:32 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D99702

--- Comment #9 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-9 branch has been updated by Kito Cheng <kito@gcc.gnu.org>:

https://gcc.gnu.org/g:3100cdf24a88aecc428e77fc8a4268947836d66c

commit r9-9301-g3100cdf24a88aecc428e77fc8a4268947836d66c
Author: Kito Cheng <kito.cheng@sifive.com>
Date:   Mon Mar 22 16:32:45 2021 +0800

    PR target/99702: Check RTL type before get value

    gcc/ChangeLog:

            PR target/99702
            * config/riscv/riscv.c (riscv_expand_block_move): Get RTL value
            after type checking.

    gcc/testsuite/ChangeLog:

            PR target/99702
            * gcc.target/riscv/pr99702.c: New.

    (cherry picked from commit 540dace2ed3949571f2ce6cb007354e69bda0cb2)=