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From: "segher at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/99718] [11 regression] ICE in new test case
 gcc.target/powerpc/pr98914.c  for 32 bits
Date: Thu, 25 Mar 2021 16:31:32 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D99718

--- Comment #7 from Segher Boessenkool <segher at gcc dot gnu.org> ---
(In reply to Jakub Jelinek from comment #6)
> I did not know whether it is implementable (in VSX or in Altivec) for 32-=
bit
> targets etc., all I was suggesting was what to do if it is not implementa=
ble.

Yes.

> If it is implementable, somebody familiar with VSX/Altivec should add the
> implementation, or we can temporarily use the patch that has been posted =
and
> get back to it later.

I haven't seen a patch posted yet?

> Or if it is partly implementable (e.g. can be done in
> VSX and can't be done in Altivec, etc.), then the patch can still be used
> after amendments for what will and what will not work.

The only thing I am saying it should be massively easier to just implement =
it
for -m32 as well, much easier than adding extra conditions (and unavoidably
getting that wrong).

> Right now it is a P1 blocker because we ICE on something that worked
> perfectly fine (perhaps slower than it could) in GCC 10.  So something ne=
eds
> to be done before GCC 11 and we have ~ a month left for that.

Yup.

I'll review any patch that is sent (cc: me, so that I see it immediately,
instead of after 3 to 6 weeks).

Thanks,


Segher=