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From: "luoxhu at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/99718] [11 regression] ICE in new test case
 gcc.target/powerpc/pr98914.c  for 32 bits
Date: Sat, 27 Mar 2021 03:42:37 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D99718

--- Comment #19 from luoxhu at gcc dot gnu.org ---
https://gcc.gnu.org/pipermail/gcc-patches/2021-March/567395.html

This patch extends variable vec_insert to all 32bit VSX targets including
Power7{BE} {32,64}, Power8{BE}{32, 64}, Power8{LE}{64}, Power9{LE}{64}, all
tested  pass for power testcases, though AIX is not tested yet. @Segher, pl=
ease
review this one instead of the previous that disables 32 bit variable
vec_insert, thanks.

For Altivec targets like power5/6/G4/G5, take the previous "vector store/sc=
alar
store/vector load" code path.

-mcpu=3Dpower6 -O2 -maltivec -c -S

f2:
.LFB0:
        .cfi_startproc
        addi 10,1,-16
        sldi 5,5,2
        li 9,32
        addi 8,1,-48
        stvx 2,8,9
        stwx 6,10,5
        lvx 2,8,9
        blr=