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From: "rguenth at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug tree-optimization/99824] [10 Regression] ICE in
 wide_int_to_tree_1, at tree.c:1572
Date: Tue, 30 Mar 2021 09:14:30 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D99824

--- Comment #7 from Richard Biener <rguenth at gcc dot gnu.org> ---
So we're value-numbering a char load

Value numbering stmt =3D _177 =3D *sc_175;

with sc_175 =3D=3D _7 and

  _7 =3D &cx_41(D)->i2c_adap[i_24].name;

which get's us a valueized ref (of type 'char') that looks like
cx_41(D)->i2c_adap[i_24].name and ao_ref_init_from_vn_reference turning
that into

$1 =3D {ref =3D <tree 0x0>, base =3D <mem_ref 0x7ffff521cf28>,=20
  offset =3D {<poly_int_pod<1, long>> =3D {coeffs =3D {388000}}, <No data f=
ields>},=20
  size =3D {<poly_int_pod<1, long>> =3D {coeffs =3D {384}}, <No data fields=
>},=20
  max_size =3D {<poly_int_pod<1, long>> =3D {coeffs =3D {384}}, <No data fi=
elds>},=20
  ref_alias_set =3D 0, base_alias_set =3D 0, volatile_p =3D false}

because it looks at COMPONENT_REF/BIT_FIELD_REF sizes but those really only
represent offsets (well, not really really, but ...).

We then arrive at

# .MEM_170 =3D VDEF <.MEM_169>
cx_41(D)->i2c_adap[i_24].name =3D "cx18 i2c driver";

So this looks like a latent thing waiting to happen.  The GIMPLE FE is
currently not happy to produce a testcase.  Trunk is somewhat more
resilent to produce the situation since vn_reference_maybe_forwprop_address
uses the SSA lattice for the address offset calculation (in this case
i_24 has value zero).

With the proposed assert at least the LTRANS unit reproduces an ICE
with a debug build for me.=