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From: "rguenth at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug rtl-optimization/99863] [10/11 Regression] wrong code with -O
 -fno-tree-forwprop -mno-sse2 since r10-7268-g529ea7d9596b26ba
Date: Thu, 01 Apr 2021 10:45:30 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D99863

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
          Component|target                      |rtl-optimization

--- Comment #6 from Richard Biener <rguenth at gcc dot gnu.org> ---
(In reply to Richard Biener from comment #5)
> (In reply to Martin Li=C5=A1ka from comment #4)
> > Started with r10-7268-g529ea7d9596b26ba.
>=20
> Reverting on trunk fixes the issue.  Good vs. bad assembly shows the like=
ly
> culprit:
>=20
>         shrq    $32, %rax
> -       movq    %rax, %r8
> -       testq   %rdi, %rdi
> +       movq    %rax, %rdi
>         setne   %al

And this is

(insn 6 3 7 2 (set (reg:CCZ 17 flags)
        (compare:CCZ (reg/v:DI 177 [ u64_0 ])
            (const_int 0 [0]))) "t.c":14:30 8 {*cmpdi_ccno_1}
     (nil))
(insn 7 6 8 2 (set (reg:QI 179)
        (eq:QI (reg:CCZ 17 flags)
            (const_int 0 [0]))) "t.c":14:30 802 {*setcc_qi}
     (expr_list:REG_DEAD (reg:CCZ 17 flags)
        (nil)))
...
(insn 23 22 24 2 (set (reg:CCZ 17 flags)
        (compare:CCZ (reg/v:DI 177 [ u64_0 ])
            (const_int 0 [0]))) "t.c":15:19 8 {*cmpdi_ccno_1}
     (nil))
(insn 24 23 25 2 (set (reg:QI 190)
        (ne:QI (reg:CCZ 17 flags)
            (const_int 0 [0]))) "t.c":15:19 802 {*setcc_qi}
     (nil))

deferring deletion of insn with uid =3D 23.

likely somehow seeing the set as a noop move.  trial is (reg:CCZ 17 flags)
but likely CSE doesn't track CC flag clobbers appropriately though there's
no other CC clobber insn visible at this point.  At least CSE1 fails
to remove the REG_DEAD note on reg:CCZ in insn 7?

Later we happily insert CC clobbers inbetween - notably DSE1 (eh?!)
produces

(insn 166 12 168 2 (set (reg:SI 262)
        (subreg:SI (reg:DI 182 [ foo0_v256u32_0 ]) 0)) "t.c":14:36 75
{*movsi_internal}
     (nil))
(insn 168 166 167 2 (set (reg:DI 263)
        (reg:DI 182 [ foo0_v256u32_0 ])) "t.c":14:36 74 {*movdi_internal}
     (expr_list:REG_DEAD (reg:DI 182 [ foo0_v256u32_0 ])
        (nil)))
(insn 167 168 169 2 (parallel [
            (set (reg:DI 263)
                (lshiftrt:DI (reg:DI 263)
                    (const_int 32 [0x20])))
            (clobber (reg:CC 17 flags))
        ]) "t.c":14:36 703 {*lshrdi3_1}
     (expr_list:REG_UNUSED (reg:CC 17 flags)
        (nil)))

which uses subregs/shifts to elide a load/store pair (I think).=