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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug rtl-optimization/99905] [8/9/10/11 Regression] wrong code with -mno-mmx -mno-sse since r7-4540-gb229ab2a712ccd44
Date: Mon, 12 Apr 2021 23:02:27 +0000	[thread overview]
Message-ID: <bug-99905-4-AzhJKjjvTD@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-99905-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99905

--- Comment #9 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Jakub Jelinek <jakub@gcc.gnu.org>:

https://gcc.gnu.org/g:ffc4155b6e45b8ab71d49a4b584f7cacb693e6b9

commit r11-8140-gffc4155b6e45b8ab71d49a4b584f7cacb693e6b9
Author: Jakub Jelinek <jakub@redhat.com>
Date:   Tue Apr 13 01:01:45 2021 +0200

    combine: Fix up expand_compound_operation [PR99905]

    The following testcase is miscompiled on x86_64-linux.
    expand_compound_operation is called on
    (zero_extract:DI (mem/c:TI (reg/f:DI 16 argp) [3 i+0 S16 A128])
        (const_int 16 [0x10])
        (const_int 63 [0x3f]))
    so mode is DImode, inner_mode is TImode, pos 63, len 16 and modewidth 64.

    A couple of lines above the problematic spot we have:
      if (modewidth >= pos + len)
        {
          tem = gen_lowpart (mode, XEXP (x, 0));
    where the code uses gen_lowpart and then shift left/right to extract it
    in mode.  But the guarding condition is false - 64 >= 63 + 16
    and so we enter the next condition, where the code shifts XEXP (x, 0)
    right by pos and then adds AND.  It does so incorrectly though.
    Given the modewidth < pos + len, inner_mode must be necessarily larger
    than mode and XEXP (x, 0) has the innermode, but it was calling
    simplify_shift_const with mode rather than inner_mode, which meant
    inconsistent arguments to simplify_shift_const and in this case made
    a DImode MEM shift out of it.

    The following patch fixes it, by doing the shift in inner_mode properly
    and then after the shift doing the lowpart subreg and masking already
    in mode.

    2021-04-13  Jakub Jelinek  <jakub@redhat.com>

            PR rtl-optimization/99905
            * combine.c (expand_compound_operation): If pos + len > modewidth,
            perform the right shift by pos in inner_mode and then convert to
mode,
            instead of trying to simplify a shift of rtx with inner_mode by pos
            as if it was a shift in mode.

            * gcc.target/i386/pr99905.c: New test.

  parent reply	other threads:[~2021-04-12 23:02 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-04  8:21 [Bug target/99905] New: wrong code with -mgeneral-regs-only zsojka at seznam dot cz
2021-04-06  6:24 ` [Bug target/99905] " marxin at gcc dot gnu.org
2021-04-06  6:51 ` zsojka at seznam dot cz
2021-04-06  6:53 ` [Bug target/99905] [8/9/10/11 Regression] wrong code with -mno-mmx -mno-sse zsojka at seznam dot cz
2021-04-06  7:07 ` [Bug target/99905] [8/9/10/11 Regression] wrong code with -mno-mmx -mno-sse since r7-4540-gb229ab2a712ccd44 marxin at gcc dot gnu.org
2021-04-06  8:00 ` rguenth at gcc dot gnu.org
2021-04-06 17:25 ` jakub at gcc dot gnu.org
2021-04-07  8:48 ` jakub at gcc dot gnu.org
2021-04-07  9:39 ` jakub at gcc dot gnu.org
2021-04-07  9:54 ` [Bug rtl-optimization/99905] " jakub at gcc dot gnu.org
2021-04-12 23:02 ` cvs-commit at gcc dot gnu.org [this message]
2021-04-12 23:03 ` [Bug rtl-optimization/99905] [8/9/10 " jakub at gcc dot gnu.org
2021-04-20  9:46 ` cvs-commit at gcc dot gnu.org
2021-04-20  9:52 ` [Bug rtl-optimization/99905] [8/9 " jakub at gcc dot gnu.org
2021-04-20 23:34 ` cvs-commit at gcc dot gnu.org
2021-04-22 16:52 ` cvs-commit at gcc dot gnu.org
2021-04-22 17:11 ` jakub at gcc dot gnu.org

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