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From: "rearnsha at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/99908] SIMD: negating logical + if_else has a suboptimal codegen. Date: Wed, 12 May 2021 12:04:35 +0000 [thread overview] Message-ID: <bug-99908-4-COWJgRNAV5@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-99908-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99908 --- Comment #8 from Richard Earnshaw <rearnsha at gcc dot gnu.org> --- Never mind, the original reference to arm was not the 'arm cpu', my mistake.
next prev parent reply other threads:[~2021-05-12 12:04 UTC|newest] Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-04-04 12:30 [Bug c++/99908] New: Arm optimisation generates a `not` instruction instead of switching arguments of bsl denis.yaroshevskij at gmail dot com 2021-04-04 20:01 ` [Bug target/99908] SIMD: negating logical + if_else has a suboptimal codegen pinskia at gcc dot gnu.org 2021-04-06 8:04 ` rguenth at gcc dot gnu.org 2021-04-06 9:41 ` crazylht at gmail dot com 2021-04-07 2:12 ` crazylht at gmail dot com 2021-05-07 2:23 ` crazylht at gmail dot com 2021-05-12 11:44 ` cvs-commit at gcc dot gnu.org 2021-05-12 11:45 ` crazylht at gmail dot com 2021-05-12 12:01 ` rearnsha at gcc dot gnu.org 2021-05-12 12:04 ` rearnsha at gcc dot gnu.org [this message] 2023-08-08 1:27 ` pinskia at gcc dot gnu.org 2023-08-08 1:29 ` pinskia at gcc dot gnu.org
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