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From: "rguenth at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/99937] Optimization needed for ARM with single cycle
 multiplier
Date: Wed, 07 Apr 2021 07:11:43 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D99937

--- Comment #3 from Richard Biener <rguenth at gcc dot gnu.org> ---
(In reply to mike.robins from comment #2)
> (In reply to Richard Biener from comment #1)
> > You need to adjust RTX costing accordingly which likely means adding a =
new
> > subtarget tuning.
>=20
> Hi Richard
> Are you saying that this would have to be added at the GCC source level
> somehow. I.e that there is no existing -mtune... or -f... to achieve this?
> Mike

Generally yes.  I don't know the arm backend enough to tell whether there
exists an ARM variant with the multiplier behaving in this way (I suppose an
in-order,
non-pipelined m0 core might behave this way ...)=