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- Log -----------------------------------------------------------------
commit 72ca39dacf00b1f40fa1ab6f82178a0b03f3d30e
Author: Richard Sandiford <richard.sandiford@arm.com>
Date:   Fri Aug 7 10:54:32 2020 +0100

    Document A64FX support in GCC 9.4

diff --git a/htdocs/gcc-9/changes.html b/htdocs/gcc-9/changes.html
index a2a28a9a..8b827386 100644
--- a/htdocs/gcc-9/changes.html
+++ b/htdocs/gcc-9/changes.html
@@ -1146,6 +1146,14 @@ are not listed here).</p>
   runtime and use them for standard atomic operations.
   For more information please refer to the documentation.
     </li>
+    <li>GCC now supports the Fujitsu A64FX.  The associated <code>-mcpu</code>
+    and <code>-mtune</code> options are <code>-mcpu=a64fx</code> and
+    <code>-mtune=a64fx</code> respectively.  In particular,
+    <code>-mcpu=a64fx</code> generates code for Armv8.2-A with SVE and
+    tunes the code for the A64FX.  This includes tuning the SVE code,
+    although by default the code is still length-agnostic and so works for
+    all SVE implementations.  Adding <code>-msve-vector-bits=512</code>
+    makes the code specific to 512-bit SVE.</li>
   </ul>
 
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Summary of changes:
 htdocs/gcc-9/changes.html | 8 ++++++++
 1 file changed, 8 insertions(+)


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