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 88e29096c36837553fc841bd1fa5df6caa776b44
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From: hongtao Liu <liuhongt@sourceware.org>
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The branch, master has been updated
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      from  053c956f6e9c71efac5be01f8a8ba79f15d87f4b (commit)

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- Log -----------------------------------------------------------------
commit 88e29096c36837553fc841bd1fa5df6caa776b44
Author: liuhongt <hongtao.liu@intel.com>
Date:   Thu Oct 29 16:51:24 2020 +0800

    [GCC-11] Mention Intel KEYLOCKER.

diff --git a/htdocs/gcc-11/changes.html b/htdocs/gcc-11/changes.html
index befee1f2..6859c91a 100644
--- a/htdocs/gcc-11/changes.html
+++ b/htdocs/gcc-11/changes.html
@@ -245,6 +245,10 @@ a work-in-progress.</p>
       UINTR intrinsics are available via the <code>-muintr</code>
       compiler switch.
   </li>
+  <li>New ISA extension support for Intel KEYLOCKER was added to GCC.
+      KEYLOCKER intrinsics are available via the <code>-mkeylocker</code>
+      compiler switch.
+  </li>
   <li>New ISA extension support for Intel AMX-TILE, AMX-INT8, AMX-BF16 was
       added to GCC. AMX-TILE, AMX-INT8, AMX-BF16 intrinsics are available
       via the <code>-mamx-tile, -mamx-int8, -mamx-bf16</code> compiler switch.
@@ -256,7 +260,8 @@ a work-in-progress.</p>
   </li>
   <li>GCC now supports the Intel CPU named Alderlake through
     <code>-march=alderlake</code>.
-    The switch enables the CLDEMOTE PTWRITE WAITPKG SERIALIZE ISA extensions.
+    The switch enables the CLDEMOTE PTWRITE WAITPKG SERIALIZE KEYLOCKER
+    ISA extensions.
   </li>
 </ul>
 

-----------------------------------------------------------------------

Summary of changes:
 htdocs/gcc-11/changes.html | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)


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