gcc-wwwdocs branch master updated. 91701c9846af9558ee3f803a1095457bdc066884

[hongtao Liu <liuhongt@sourceware.org>]

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- Log -----------------------------------------------------------------
commit 91701c9846af9558ee3f803a1095457bdc066884
Author: liuhongt <hongtao.liu@intel.com>
Date:   Wed Nov 11 10:59:24 2020 +0800

    [GCC-11] Mention Intel AVX-VNNI and add HRESET to ALDERLAKE.

diff --git a/htdocs/gcc-11/changes.html b/htdocs/gcc-11/changes.html
index d7a3a1f9..fc4c74f4 100644
--- a/htdocs/gcc-11/changes.html
+++ b/htdocs/gcc-11/changes.html
@@ -267,15 +267,20 @@ a work-in-progress.</p>
       added to GCC. AMX-TILE, AMX-INT8, AMX-BF16 intrinsics are available
       via the <code>-mamx-tile, -mamx-int8, -mamx-bf16</code> compiler switch.
   </li>
+  <li>New ISA extension support for Intel AVX-VNNI was added to GCC.
+      AVX-VNNI intrinsics are available via the <code>-mavxvnni</code>
+      compiler switch.
+  </li>
   <li>GCC now supports the Intel CPU named Sapphire Rapids through
     <code>-march=sapphirerapids</code>.
     The switch enables the MOVDIRI MOVDIR64B AVX512VP2INTERSECT ENQCMD CLDEMOTE
-    SERIALIZE PTWRITE WAITPKG TSXLDTRK AMT-TILE AMX-INT8 AMX-BF16 ISA extensions.
+    SERIALIZE PTWRITE WAITPKG TSXLDTRK AMT-TILE AMX-INT8 AMX-BF16 AVX-VNNI
+    ISA extensions.
   </li>
   <li>GCC now supports the Intel CPU named Alderlake through
     <code>-march=alderlake</code>.
-    The switch enables the CLDEMOTE PTWRITE WAITPKG SERIALIZE KEYLOCKER
-    ISA extensions.
+    The switch enables the CLDEMOTE PTWRITE WAITPKG SERIALIZE KEYLOCKER AVX-VNNI
+    HRESET ISA extensions.
   </li>
 </ul>
 

-----------------------------------------------------------------------

Summary of changes:
 htdocs/gcc-11/changes.html | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)


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