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From: Gerald Pfeifer <gerald@sourceware.org> To: gcc-cvs-wwwdocs@gcc.gnu.org Subject: gcc-wwwdocs branch master updated. c73087215447ea88ee08df1c4293ad4c5f425a34 Date: Thu, 12 Nov 2020 19:31:04 +0000 (GMT) [thread overview] Message-ID: <20201112193104.D8C413858002@sourceware.org> (raw) This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "gcc-wwwdocs". The branch, master has been updated via c73087215447ea88ee08df1c4293ad4c5f425a34 (commit) from 91701c9846af9558ee3f803a1095457bdc066884 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit c73087215447ea88ee08df1c4293ad4c5f425a34 Author: Gerald Pfeifer <gerald@pfeifer.com> Date: Thu Nov 12 20:28:55 2020 +0100 Editorial changes around x86-64 ISA extensions diff --git a/htdocs/gcc-11/changes.html b/htdocs/gcc-11/changes.html index fc4c74f4..106db8e9 100644 --- a/htdocs/gcc-11/changes.html +++ b/htdocs/gcc-11/changes.html @@ -265,7 +265,8 @@ a work-in-progress.</p> </li> <li>New ISA extension support for Intel AMX-TILE, AMX-INT8, AMX-BF16 was added to GCC. AMX-TILE, AMX-INT8, AMX-BF16 intrinsics are available - via the <code>-mamx-tile, -mamx-int8, -mamx-bf16</code> compiler switch. + via the <code>-mamx-tile, -mamx-int8, -mamx-bf16</code> compiler + switches. </li> <li>New ISA extension support for Intel AVX-VNNI was added to GCC. AVX-VNNI intrinsics are available via the <code>-mavxvnni</code> @@ -273,14 +274,14 @@ a work-in-progress.</p> </li> <li>GCC now supports the Intel CPU named Sapphire Rapids through <code>-march=sapphirerapids</code>. - The switch enables the MOVDIRI MOVDIR64B AVX512VP2INTERSECT ENQCMD CLDEMOTE - SERIALIZE PTWRITE WAITPKG TSXLDTRK AMT-TILE AMX-INT8 AMX-BF16 AVX-VNNI - ISA extensions. + The switch enables the MOVDIRI, MOVDIR64B, AVX512VP2INTERSECT, ENQCMD, + CLDEMOTE, SERIALIZE, PTWRITE, WAITPKG, TSXLDTRK, AMT-TILE, AMX-INT8, + AMX-BF16, and AVX-VNNI ISA extensions. </li> <li>GCC now supports the Intel CPU named Alderlake through <code>-march=alderlake</code>. - The switch enables the CLDEMOTE PTWRITE WAITPKG SERIALIZE KEYLOCKER AVX-VNNI - HRESET ISA extensions. + The switch enables the CLDEMOTE, PTWRITE, WAITPKG, SERIALIZE, KEYLOCKER, + AVX-VNNI, and HRESET ISA extensions. </li> </ul> ----------------------------------------------------------------------- Summary of changes: htdocs/gcc-11/changes.html | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) hooks/post-receive -- gcc-wwwdocs
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