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From: Kito Cheng <kito@sourceware.org> To: gcc-cvs-wwwdocs@gcc.gnu.org Subject: gcc-wwwdocs branch master updated. 3bc28f262ae6300a635c6c9bec2f1f8706bc3105 Date: Tue, 30 Mar 2021 15:01:57 +0000 (GMT) [thread overview] Message-ID: <20210330150157.810A53858023@sourceware.org> (raw) This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "gcc-wwwdocs". The branch, master has been updated via 3bc28f262ae6300a635c6c9bec2f1f8706bc3105 (commit) from a5770fa521c605abeb95b8d477f6495abcc3601d (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 3bc28f262ae6300a635c6c9bec2f1f8706bc3105 Author: Kito Cheng <kito.cheng@sifive.com> Date: Wed Mar 24 11:17:15 2021 +0800 gcc-11/changes: Document RISC-V changes diff --git a/htdocs/gcc-11/changes.html b/htdocs/gcc-11/changes.html index b22b119c..a7fa4e1b 100644 --- a/htdocs/gcc-11/changes.html +++ b/htdocs/gcc-11/changes.html @@ -693,7 +693,40 @@ a work-in-progress.</p> </li> </ul> -<!-- <h3 id="riscv">RISC-V</h3> --> +<h3 id="riscv">RISC-V</h3> +<ul> + <li>Support address sanitizer for RISC-V.</li> + <li>Support big-endian for RISC-V, thanks to Marcus Comstedt.</li> + <li>Implement new style of architecture extension test macros, + each architecture extension has corresponding feature test macro, which + could use to test its existence and version information. + </li> + <li>Legacy architecture extension test macro like <code>__riscv_atomic</code>, + are deprecated, but it will still supported for at least 2 release cycles. + </li> + <li>Support IFUNC for <code>riscv*-*-linux*</code>.</li> + <li>Add new option -misa-spec=* to control ISA spec version, default is 2.2, + this option could control the default version of each extensions.</li> + <li>Introduce <code>--with-multilib-generator</code> to configure time option, + this option could flexible config multi-lib settings, syntax is same as + RISC-V's <code>multilib-generator</code>. + </li> + <li>Extend the sytax for <code>multilib-generator</code>, support expansion + operator <code>*</code> to reduce the complexity of complicated multi-lib + re-use rule. + </li> + <li>Support <code>-mcpu=*</code> option, the behavior is aligned to RISC-V + clang/LLVM, it will set pipeline model and architecture extension, like + <code>-mtune=*</code> plus <code>-march=*</code>. + </li> + <li>Support for TLS stack protector canary access, thanks to Cooper Qu. + </li> + <li>Support <code>__builtin_thread_pointer</code> for RISC-V.</li> + <li>Introduce <code>shorten_memrefs</code> optimization, which could reduce the + code size for memory access, thanks to Craig Blackmore. + </li> +</ul> + <!-- <h3 id="rx">RX</h3> --> ----------------------------------------------------------------------- Summary of changes: htdocs/gcc-11/changes.html | 35 ++++++++++++++++++++++++++++++++++- 1 file changed, 34 insertions(+), 1 deletion(-) hooks/post-receive -- gcc-wwwdocs
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