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commit 2b40df15e0bdac2bfa38ed9f881c16c801044e45
Author: Christoph Müllner
Date: Wed Mar 15 10:08:18 2023 +0100
gcc-13: riscv: Document the T-Head CPU support
Document the new T-Head CPU support for RISC-V.
Signed-off-by: Philipp Tomsich
diff --git a/htdocs/gcc-13/changes.html b/htdocs/gcc-13/changes.html
index 209c13cd..c8d757b6 100644
--- a/htdocs/gcc-13/changes.html
+++ b/htdocs/gcc-13/changes.html
@@ -552,6 +552,28 @@ a work-in-progress.
RISC-V
- New ISA extension support for zawrs.
+ - Support for the following vendor extensions has been added:
+
+ - XTheadBa
+ - XTheadBb
+ - XTheadBs
+ - XTheadCmo
+ - XTheadCondMov
+ - XTheadFMemIdx
+ - XTheadFmv
+ - XTheadInt
+ - XTheadMac
+ - XTheadMemIdx
+ - XTheadMemPair
+ - XTheadSync
+
+
+ - The following new CPUs are supported through the
-mcpu
+ option (GCC identifiers in parentheses).
+
+ - T-Head's XuanTie C906 (
thead-c906
).
+
+
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Summary of changes:
htdocs/gcc-13/changes.html | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
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