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To: gcc-cvs-wwwdocs@gcc.gnu.org
Subject: gcc-wwwdocs branch master updated. 4b2333befaeb25f4976c8287e519aba020d61243
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Date: Mon, 17 Jul 2023 06:44:17 +0000 (GMT)
From: Haochen Jiang
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The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 4b2333befaeb25f4976c8287e519aba020d61243
Author: Haochen Jiang
Date: Mon Jul 17 11:28:03 2023 +0800
gcc-13/14: Mention Intel new ISA and march support
diff --git a/htdocs/gcc-13/changes.html b/htdocs/gcc-13/changes.html
index 39414e18..68e8c5cc 100644
--- a/htdocs/gcc-13/changes.html
+++ b/htdocs/gcc-13/changes.html
@@ -593,6 +593,10 @@ You may also want to check out our
GCC now supports the Intel CPU named Granite Rapids through
-march=graniterapids
.
+ The switch enables the AMX-FP16, PREFETCHI ISA extensions.
+
+ GCC now supports the Intel CPU named Granite Rapids D through
+ -march=graniterapids-d
.
The switch enables the AMX-FP16, PREFETCHI and AMX-COMPLEX ISA extensions.
GCC now supports AMD CPUs based on the znver4
core
diff --git a/htdocs/gcc-14/changes.html b/htdocs/gcc-14/changes.html
index 3f797642..dad1ba53 100644
--- a/htdocs/gcc-14/changes.html
+++ b/htdocs/gcc-14/changes.html
@@ -108,7 +108,39 @@ a work-in-progress.
-
+IA-32/x86-64
+
+ - New ISA extension support for Intel AVX-VNNI-INT16 was added.
+ AVX-VNNI-INT16 intrinsics are available via the
-mavxvnniint16
+ compiler switch.
+
+ - New ISA extension support for Intel SHA512 was added.
+ SHA512 intrinsics are available via the
-msha512
+ compiler switch.
+
+ - New ISA extension support for Intel SM3 was added.
+ SM3 intrinsics are available via the
-msm3
+ compiler switch.
+
+ - New ISA extension support for Intel SM4 was added.
+ SM4 intrinsics are available via the
-msm4
+ compiler switch.
+
+ - GCC now supports the Intel CPU named Arrow Lake through
+
-march=arrowlake
.
+ Based on Alder Lake, the switch further enables the AVX-IFMA,
+ AVX-VNNI-INT8, AVX-NE-CONVERT and CMPccXADD ISA extensions.
+
+ - GCC now supports the Intel CPU named Arrow Lake S through
+
-march=arrowlake-s
.
+ Based on Arrow Lake, the switch further enables the AVX-VNNI-INT16, SHA512,
+ SM3 and SM4 ISA extensions.
+
+ - GCC now supports the Intel CPU named Lunar Lake through
+
-march=lunarlake
.
+ Lunar Lake is based on Arrow Lake S.
+
+
-----------------------------------------------------------------------
Summary of changes:
htdocs/gcc-13/changes.html | 4 ++++
htdocs/gcc-14/changes.html | 34 +++++++++++++++++++++++++++++++++-
2 files changed, 37 insertions(+), 1 deletion(-)
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