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* [gcc/devel/c++-modules] i386: Use ix86_output_ssemov for DFmode TYPE_SSEMOV
@ 2020-03-19 12:41 Nathan Sidwell
0 siblings, 0 replies; only message in thread
From: Nathan Sidwell @ 2020-03-19 12:41 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:fd8679974b2ded884ffd7d912efef7fe13e4ff4f
commit fd8679974b2ded884ffd7d912efef7fe13e4ff4f
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Fri Mar 13 02:48:59 2020 -0700
i386: Use ix86_output_ssemov for DFmode TYPE_SSEMOV
There is no need to set mode attribute to XImode nor V8DFmode since
ix86_output_ssemov can properly encode xmm16-xmm31 registers with and
without AVX512VL.
gcc/
PR target/89229
* config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
* config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
TARGET_AVX512VL and ext_sse_reg_operand check.
gcc/testsuite/
PR target/89229
* gcc.target/i386/pr89229-4a.c: New test.
* gcc.target/i386/pr89229-4b.c: Likewise.
* gcc.target/i386/pr89229-4c.c: Likewise.
Diff:
---
gcc/ChangeLog | 8 ++++++
gcc/config/i386/i386.c | 6 ++++
gcc/config/i386/i386.md | 44 ++----------------------------
gcc/testsuite/ChangeLog | 7 +++++
gcc/testsuite/gcc.target/i386/pr89229-4a.c | 16 +++++++++++
gcc/testsuite/gcc.target/i386/pr89229-4b.c | 7 +++++
gcc/testsuite/gcc.target/i386/pr89229-4c.c | 6 ++++
7 files changed, 53 insertions(+), 41 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ac8940a25f7..25abfcfd70d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/89229
+ * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
+ * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
+ for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
+ TARGET_AVX512VL and ext_sse_reg_operand check.
+
2020-03-13 Bu Le <bule1@huawei.com>
PR target/94154
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 6d83855692f..924f9558b24 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -5127,6 +5127,12 @@ ix86_output_ssemov (rtx_insn *insn, rtx *operands)
else
return "%vmovq\t{%1, %0|%0, %1}";
+ case MODE_DF:
+ if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1]))
+ return "vmovsd\t{%d1, %0|%0, %d1}";
+ else
+ return "%vmovsd\t{%1, %0|%0, %1}";
+
case MODE_V1DF:
gcc_assert (!TARGET_AVX);
return "movlpd\t{%1, %0|%0, %1}";
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 8b5ae34ee11..0f57f939cc3 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -3355,37 +3355,7 @@
return standard_sse_constant_opcode (insn, operands);
case TYPE_SSEMOV:
- switch (get_attr_mode (insn))
- {
- case MODE_DF:
- if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1]))
- return "vmovsd\t{%d1, %0|%0, %d1}";
- return "%vmovsd\t{%1, %0|%0, %1}";
-
- case MODE_V4SF:
- return "%vmovaps\t{%1, %0|%0, %1}";
- case MODE_V8DF:
- return "vmovapd\t{%g1, %g0|%g0, %g1}";
- case MODE_V2DF:
- return "%vmovapd\t{%1, %0|%0, %1}";
-
- case MODE_V2SF:
- gcc_assert (!TARGET_AVX);
- return "movlps\t{%1, %0|%0, %1}";
- case MODE_V1DF:
- gcc_assert (!TARGET_AVX);
- return "movlpd\t{%1, %0|%0, %1}";
-
- case MODE_DI:
- /* Handle broken assemblers that require movd instead of movq. */
- if (!HAVE_AS_IX86_INTERUNIT_MOVQ
- && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1])))
- return "%vmovd\t{%1, %0|%0, %1}";
- return "%vmovq\t{%1, %0|%0, %1}";
-
- default:
- gcc_unreachable ();
- }
+ return ix86_output_ssemov (insn, operands);
default:
gcc_unreachable ();
@@ -3439,10 +3409,7 @@
/* xorps is one byte shorter for non-AVX targets. */
(eq_attr "alternative" "12,16")
- (cond [(and (match_test "TARGET_AVX512F")
- (not (match_test "TARGET_PREFER_AVX256")))
- (const_string "XI")
- (match_test "TARGET_AVX")
+ (cond [(match_test "TARGET_AVX")
(const_string "V2DF")
(ior (not (match_test "TARGET_SSE2"))
(match_test "optimize_function_for_size_p (cfun)"))
@@ -3458,12 +3425,7 @@
/* movaps is one byte shorter for non-AVX targets. */
(eq_attr "alternative" "13,17")
- (cond [(and (ior (not (match_test "TARGET_PREFER_AVX256"))
- (not (match_test "TARGET_AVX512VL")))
- (ior (match_operand 0 "ext_sse_reg_operand")
- (match_operand 1 "ext_sse_reg_operand")))
- (const_string "V8DF")
- (match_test "TARGET_AVX")
+ (cond [(match_test "TARGET_AVX")
(const_string "DF")
(ior (not (match_test "TARGET_SSE2"))
(match_test "optimize_function_for_size_p (cfun)"))
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index e695b9bf26f..5060981700a 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/89229
+ * gcc.target/i386/pr89229-4a.c: New test.
+ * gcc.target/i386/pr89229-4b.c: Likewise.
+ * gcc.target/i386/pr89229-4c.c: Likewise.
+
2019-03-13 Eric Botcazou <ebotcazou@adacore.com>
* gcc.c-torture/compile/20200313-1.c: New test.
diff --git a/gcc/testsuite/gcc.target/i386/pr89229-4a.c b/gcc/testsuite/gcc.target/i386/pr89229-4a.c
new file mode 100644
index 00000000000..5bc10d25619
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr89229-4a.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -march=skylake-avx512" } */
+
+extern double d;
+
+void
+foo1 (double x)
+{
+ register double xmm16 __asm ("xmm16") = x;
+ asm volatile ("" : "+v" (xmm16));
+ register double xmm17 __asm ("xmm17") = xmm16;
+ asm volatile ("" : "+v" (xmm17));
+ d = xmm17;
+}
+
+/* { dg-final { scan-assembler-not "vmovapd" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr89229-4b.c b/gcc/testsuite/gcc.target/i386/pr89229-4b.c
new file mode 100644
index 00000000000..228aeb7b580
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr89229-4b.c
@@ -0,0 +1,7 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -march=skylake-avx512 -mno-avx512vl" } */
+
+#include "pr89229-4a.c"
+
+/* { dg-final { scan-assembler-not "%zmm\[0-9\]+" } } */
+/* { dg-final { scan-assembler-not "vmovapd" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr89229-4c.c b/gcc/testsuite/gcc.target/i386/pr89229-4c.c
new file mode 100644
index 00000000000..537c82fbc54
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr89229-4c.c
@@ -0,0 +1,6 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -march=skylake-avx512 -mprefer-vector-width=512" } */
+
+#include "pr89229-4a.c"
+
+/* { dg-final { scan-assembler-not "%zmm\[0-9\]+" } } */
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