[gcc r10-7602] aarch64: Fix {ash[lr], lshr}<mode>3 expanders [PR94488]

[gcc r10-7602] aarch64: Fix {ash[lr], lshr}<mode>3 expanders [PR94488]

[Jakub Jelinek]

https://gcc.gnu.org/g:2daa92ac4b51387e55e88ee48bdc2fab7ba25981

commit r10-7602-g2daa92ac4b51387e55e88ee48bdc2fab7ba25981
Author: Jakub Jelinek <jakub@redhat.com>
Date:   Tue Apr 7 19:04:31 2020 +0200

    aarch64: Fix {ash[lr],lshr}<mode>3 expanders [PR94488]
    
    The following testcase ICEs on aarch64 apparently since the introduction of
    the aarch64 port.  The reason is that the {ashl,ashr,lshr}<mode>3 expanders
    completely unnecessarily FAIL; if operands[2] is something other than
    a CONST_INT or REG or MEM and the middle-end code can't cope with the
    pattern giving up in these cases.  All the expanders use general_operand
    predicate for the shift amount operand, but then have just a special case
    for CONST_INT (if in-bound, emit an immediate shift, otherwise force into
    REG), or MEM (force into REG), or REG (that is the case it handles).
    In the testcase, operands[2] is a lowpart SUBREG of a REG, which is valid
    general_operand.
    I don't see any reason what is magic about MEMs that it should be forced
    into REG and others like SUBREGs that it shouldn't, there isn't even a
    reason to check for !REG_P because force_reg will do nothing if the operand
    is already a REG, and otherwise can handle general_operand just fine.
    
    2020-04-07  Jakub Jelinek  <jakub@redhat.com>
    
            PR target/94488
            * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
            ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
            Assume it is a REG after that instead of testing it and doing FAIL
            otherwise.  Formatting fix.
    
            * gcc.c-torture/compile/pr94488.c: New test.

Diff:
---
 gcc/ChangeLog           | 6 ++++++
 gcc/testsuite/ChangeLog | 3 +++
 2 files changed, 9 insertions(+)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b5c9aed6701..8c5e197591b 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -58,6 +58,12 @@
 	* config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
 	for inter-lane permutation for 64-byte modes.
 
+	PR target/94488
+	* config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
+	ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
+	Assume it is a REG after that instead of testing it and doing FAIL
+	otherwise.  Formatting fix.
+
 2020-04-07  Sebastian Huber  <sebastian.huber@embedded-brains.de>
 
 	* config/rs6000/t-rtems: Delete mcpu=8540 multilib.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 4d547a5bade..ab04cc08f43 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -54,6 +54,9 @@
 	PR c++/94512
 	* g++.dg/gomp/pr94512.C: New test.
 
+	PR target/94488
+	* gcc.c-torture/compile/pr94488.c: New test.
+
 	PR target/94500
 	* gcc.target/i386/avx512bw-pr94500.c: New test.