[gcc(refs/users/guojiufu/heads/personal-branch)] aarch64: Fix an ICE in register_tuple_type [PR95523]

[gcc(refs/users/guojiufu/heads/personal-branch)] aarch64: Fix an ICE in register_tuple_type [PR95523]

[Jiu Fu Guo]

https://gcc.gnu.org/g:b5cebc9ab7f6ab47067dc04cae17bf9921a62a18

commit b5cebc9ab7f6ab47067dc04cae17bf9921a62a18
Author: z00219097 <z.zhanghaijian@huawei.com>
Date:   Wed Jun 10 16:58:51 2020 +0100

    aarch64: Fix an ICE in register_tuple_type [PR95523]
    
    When registering the tuple type in register_tuple_type, the
    TYPE_ALIGN (tuple_type) will be changed by -fpack-struct=n. We need to
    maintain natural alignment in handle_arm_sve_h.
    
    2020-06-10  Haijian Zhang  <z.zhanghaijian@huawei.com>
    
    gcc/
            PR target/95523
            * config/aarch64/aarch64-sve-builtins.h
            (sve_switcher::m_old_maximum_field_alignment): New member.
            * config/aarch64/aarch64-sve-builtins.cc
            (sve_switcher::sve_switcher): Save maximum_field_alignment in
            m_old_maximum_field_alignment and clear maximum_field_alignment.
            (sve_switcher::~sve_switcher): Restore maximum_field_alignment.
    
    gcc/testsuite/
            PR target/95523
            * gcc.target/aarch64/sve/pr95523.c: New test.

Diff:
---
 gcc/config/aarch64/aarch64-sve-builtins.cc     |  4 ++++
 gcc/config/aarch64/aarch64-sve-builtins.h      |  1 +
 gcc/testsuite/gcc.target/aarch64/sve/pr95523.c | 10 ++++++++++
 3 files changed, 15 insertions(+)

diff --git a/gcc/config/aarch64/aarch64-sve-builtins.cc b/gcc/config/aarch64/aarch64-sve-builtins.cc
index bdb04e8170d..c49fcebcd43 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins.cc
+++ b/gcc/config/aarch64/aarch64-sve-builtins.cc
@@ -878,6 +878,9 @@ sve_switcher::sve_switcher ()
   aarch64_isa_flags = (AARCH64_FL_FP | AARCH64_FL_SIMD | AARCH64_FL_F16
 		       | AARCH64_FL_SVE);
 
+  m_old_maximum_field_alignment = maximum_field_alignment;
+  maximum_field_alignment = 0;
+
   m_old_general_regs_only = TARGET_GENERAL_REGS_ONLY;
   global_options.x_target_flags &= ~MASK_GENERAL_REGS_ONLY;
 
@@ -895,6 +898,7 @@ sve_switcher::~sve_switcher ()
   if (m_old_general_regs_only)
     global_options.x_target_flags |= MASK_GENERAL_REGS_ONLY;
   aarch64_isa_flags = m_old_isa_flags;
+  maximum_field_alignment = m_old_maximum_field_alignment;
 }
 
 function_builder::function_builder ()
diff --git a/gcc/config/aarch64/aarch64-sve-builtins.h b/gcc/config/aarch64/aarch64-sve-builtins.h
index 526d9f55e7b..3ffe2516df9 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins.h
+++ b/gcc/config/aarch64/aarch64-sve-builtins.h
@@ -658,6 +658,7 @@ public:
 
 private:
   unsigned long m_old_isa_flags;
+  unsigned int m_old_maximum_field_alignment;
   bool m_old_general_regs_only;
   bool m_old_have_regs_of_mode[MAX_MACHINE_MODE];
 };
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pr95523.c b/gcc/testsuite/gcc.target/aarch64/sve/pr95523.c
new file mode 100644
index 00000000000..547120a82ec
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pr95523.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fpack-struct=2" } */
+
+#include <arm_sve.h>
+
+void foo ()
+{
+  // Do nothing
+}
+