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* [gcc r10-8307] amdgcn: use unsigned extend for lshiftrt
@ 2020-06-15 12:45 Andrew Stubbs
  0 siblings, 0 replies; only message in thread
From: Andrew Stubbs @ 2020-06-15 12:45 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:8a3453786c3c2d6343c5258e564ad139d5ad116f

commit r10-8307-g8a3453786c3c2d6343c5258e564ad139d5ad116f
Author: Andrew Stubbs <ams@codesourcery.com>
Date:   Tue Apr 28 20:48:51 2020 +0100

    amdgcn: use unsigned extend for lshiftrt
    
    This fixes a wrong-code logic error in a previous patch.
    Detected by gcc.c-torture/execute/pr53645-2.c.
    
            gcc/
            * config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.
    
    (cherry picked from commit b8db70e1f1cea312888470e1911c7b5e32333c61)

Diff:
---
 gcc/config/gcn/gcn-valu.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md
index dd55c08dae4..6d7fecaa12c 100644
--- a/gcc/config/gcn/gcn-valu.md
+++ b/gcc/config/gcn/gcn-valu.md
@@ -2113,7 +2113,7 @@
   ""
   {
     enum {ashift, lshiftrt, ashiftrt};
-    bool unsignedp = (<code> == ashift || <code> == ashiftrt);
+    bool unsignedp = (<code> == lshiftrt);
     rtx insi1 = gen_reg_rtx (<VnSI>mode);
     rtx insi2 = gen_reg_rtx (<VnSI>mode);
     rtx outsi = gen_reg_rtx (<VnSI>mode);


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