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* [gcc/devel/c++-coroutines] ira: Fix unnecessary register spill
@ 2020-07-09 19:59 Iain D Sandoe
0 siblings, 0 replies; only message in thread
From: Iain D Sandoe @ 2020-07-09 19:59 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:edf95e51e53697f3050f076675c26a4cece17741
commit edf95e51e53697f3050f076675c26a4cece17741
Author: Omar Tahir <omar.tahir@arm.com>
Date: Thu Jul 9 10:14:19 2020 +0100
ira: Fix unnecessary register spill
The variables first_moveable_pseudo and last_moveable_pseudo aren't
reset after compiling a function, which means they leak into the first
scheduler pass of the following function. In some cases, this can cause
an extra spill during register allocation of the second function.
gcc/ChangeLog:
* ira.c (move_unallocated_pseudos): Zero first_moveable_pseudo and
last_moveable_pseudo before returning.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/nospill.c: New test.
Diff:
---
gcc/ira.c | 2 ++
gcc/testsuite/gcc.target/aarch64/nospill.c | 35 ++++++++++++++++++++++++++++++
2 files changed, 37 insertions(+)
diff --git a/gcc/ira.c b/gcc/ira.c
index a655ae12eb2..b748a6de3c2 100644
--- a/gcc/ira.c
+++ b/gcc/ira.c
@@ -5126,6 +5126,8 @@ move_unallocated_pseudos (void)
INSN_UID (newinsn), i);
SET_REG_N_REFS (i, 0);
}
+
+ first_moveable_pseudo = last_moveable_pseudo = 0;
}
\f
/* If the backend knows where to allocate pseudos for hard
diff --git a/gcc/testsuite/gcc.target/aarch64/nospill.c b/gcc/testsuite/gcc.target/aarch64/nospill.c
new file mode 100644
index 00000000000..968a4267e0d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/nospill.c
@@ -0,0 +1,35 @@
+/* { dg-do compile } */
+/* { dg-options "-O3" } */
+
+/* The pseudo for P is marked as moveable in the IRA pass. */
+float
+func_0 (float a, float b, float c)
+{
+ float p = c / a;
+
+ if (b > 1)
+ {
+ b /= p;
+ if (c > 2)
+ a /= 3;
+ }
+
+ return b / c * a;
+}
+
+/* If first_moveable_pseudo and last_moveable_pseudo are not reset correctly,
+ they will carry over and spill the pseudo for Q. */
+float
+func_1 (float a, float b, float c)
+{
+ float q = a + b;
+
+ c *= a / (b + b);
+ if (a > 0)
+ c *= q;
+
+ return a * b * c;
+}
+
+/* We have plenty of spare registers, so check nothing has been spilled. */
+/* { dg-final { scan-assembler-not "\tstr\t" } } */
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