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* [gcc(refs/users/aoliva/heads/testbase)] Test case for PR rtl-optimization/60473
@ 2020-08-06 6:32 Alexandre Oliva
0 siblings, 0 replies; only message in thread
From: Alexandre Oliva @ 2020-08-06 6:32 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:76eafcc395d2bcd4147cb1ba1a8aff321571402f
commit 76eafcc395d2bcd4147cb1ba1a8aff321571402f
Author: Roger Sayle <roger@nextmovesoftware.com>
Date: Tue Aug 4 16:56:06 2020 +0100
Test case for PR rtl-optimization/60473
PR rtl-optimization/60473 is code quality regression that has
been cured by improvements to register allocation. For the function
in the test case, GCC 4.4, 4.5 and 4.6 generated very poor code
requiring two mov instructions, and GCC 4.7 and 4.8 (when the PR was
filed) produced better but still poor code with one mov instruction.
Since GCC 4.9 (including current mainline), it generates optimal
code with no mov instructions, matching what used to be generated
in GCC 4.1.
2020-08-04 Roger Sayle <roger@nextmovesoftware.com>
gcc/testsuite/ChangeLog
PR rtl-optimization/60473
* gcc.target/i386/pr60473.c: New test.
Diff:
---
gcc/testsuite/gcc.target/i386/pr60473.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/gcc/testsuite/gcc.target/i386/pr60473.c b/gcc/testsuite/gcc.target/i386/pr60473.c
new file mode 100644
index 00000000000..d81962e7b67
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr60473.c
@@ -0,0 +1,12 @@
+/* PR rtl-optimization/60473 */
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2" } */
+
+unsigned long long foo()
+{
+ unsigned long long h,l;
+ asm volatile ("rdtsc": "=a" (l), "=d" (h));
+ return l | (h << 32);
+}
+
+/* { dg-final { scan-assembler-not "mov" } } */
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2020-08-06 6:32 [gcc(refs/users/aoliva/heads/testbase)] Test case for PR rtl-optimization/60473 Alexandre Oliva
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