From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1059) id C65623945055; Thu, 27 Aug 2020 18:05:22 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C65623945055 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1598551522; bh=cHmUgLCOtsT/i6MIAdwtjakt+k8FAX3qAIQhRNKPAJM=; h=From:To:Subject:Date:From; b=yXcJQ2uVYTG7FPU4A4w2IC9PKZDJ2attrdcgh8KOXBeI7EcrVQsy1/Px9xUd5wtrH hVuftvUuHFhFhYVye+nRcpOOuVeQYT/nEkCO86H2P0NGiza3eeYieSAVs1Pqra534X +Su0RkcfjUbUmGIGHQXKJvVdgXtAs+ZN3pgqX/d4= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Nathan Sidwell To: gcc-cvs@gcc.gnu.org Subject: [gcc/devel/c++-modules] i386: Improve code generation of smin(x, 0) with -m32. X-Act-Checkin: gcc X-Git-Author: Roger Sayle X-Git-Refname: refs/heads/devel/c++-modules X-Git-Oldrev: 5b065f0563262a0d6cd1fea8426913bfdd841301 X-Git-Newrev: e4ced0b60ccb4c944970304cf74f1ee9086e5553 Message-Id: <20200827180522.C65623945055@sourceware.org> Date: Thu, 27 Aug 2020 18:05:22 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 27 Aug 2020 18:05:22 -0000 https://gcc.gnu.org/g:e4ced0b60ccb4c944970304cf74f1ee9086e5553 commit e4ced0b60ccb4c944970304cf74f1ee9086e5553 Author: Roger Sayle Date: Mon Aug 10 21:09:16 2020 +0100 i386: Improve code generation of smin(x,0) with -m32. To make amends for the recent (temporary) testsuite failure of my new gcc.target/i386/minmax-9.c when compiled with -m32, this patch improves the -m32 code we generate for the examples in that test case. The trick is to expand smin(x,0) as "x < 0 ? x : 0" instead of the current "x <= 0 ? x : 0", as the former can take advantage of sign_bit_mask operations. 2020-08-10 Roger Sayle gcc/ChangeLog * config/i386/i386-expand.c (ix86_expand_int_movcc): Expand signed MIN_EXPR against zero as "x < 0 ? x : 0" instead of "x <= 0 ? x : 0" to enable sign_bit_compare_p optimizations. gcc/testsuite/ChangeLog * gcc.target/i386/minmax-12.c: New test. Diff: --- gcc/config/i386/i386-expand.c | 12 +++++++++++- gcc/testsuite/gcc.target/i386/minmax-12.c | 17 +++++++++++++++++ 2 files changed, 28 insertions(+), 1 deletion(-) diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c index 1bd0df4daf4..f441ba929bc 100644 --- a/gcc/config/i386/i386-expand.c +++ b/gcc/config/i386/i386-expand.c @@ -3305,7 +3305,17 @@ ix86_expand_int_movcc (rtx operands[]) { var = operands[2]; if (INTVAL (operands[3]) == 0 && operands[2] != constm1_rtx) - operands[2] = constm1_rtx, op = and_optab; + { + /* For smin (x, 0), expand as "x < 0 ? x : 0" instead of + "x <= 0 ? x : 0" to enable sign_bit_compare_p. */ + if (code == LE && op1 == const0_rtx && rtx_equal_p (op0, var)) + operands[1] = simplify_gen_relational (LT, VOIDmode, + GET_MODE (op0), + op0, const0_rtx); + + operands[2] = constm1_rtx; + op = and_optab; + } else if (INTVAL (operands[3]) == -1 && operands[3] != const0_rtx) operands[2] = const0_rtx, op = ior_optab; else diff --git a/gcc/testsuite/gcc.target/i386/minmax-12.c b/gcc/testsuite/gcc.target/i386/minmax-12.c new file mode 100644 index 00000000000..40efe541e30 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/minmax-12.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target ia32 } } */ +/* { dg-options "-O2 -march=i386 -mtune=generic" } */ + +#define min(a,b) (((a) < (b))? (a) : (b)) + +int foo(int x) +{ + return min(x,0); +} + +signed char bar(signed char x) +{ + return min(x,0); +} + +/* { dg-final { scan-assembler "cltd" } } */ +/* { dg-final { scan-assembler "sarb" } } */