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* [gcc/devel/c++-modules] According to instruction_tables.pdf
@ 2020-08-28 15:59 Nathan Sidwell
  0 siblings, 0 replies; only message in thread
From: Nathan Sidwell @ 2020-08-28 15:59 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:16516644d8f5c13e666251470d604778d347f796

commit 16516644d8f5c13e666251470d604778d347f796
Author: liuhongt <hongtao.liu@intel.com>
Date:   Thu Oct 24 11:13:00 2019 +0800

    According to instruction_tables.pdf
    
    1. Set cost of movement inside mask registers a bit higher than gpr's.
    2. Set cost of movement between mask register and gpr much higher than movement
       inside gpr, but still less equal than load/store.
    3. Set cost of mask register load/store a bit higher than gpr load/store.
    
    gcc/
            * config/i386/x86-tune-costs.h (skylake_cost): Adjust cost
            model.

Diff:
---
 gcc/config/i386/x86-tune-costs.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/gcc/config/i386/x86-tune-costs.h b/gcc/config/i386/x86-tune-costs.h
index 256c84e364e..a782a9dd9e3 100644
--- a/gcc/config/i386/x86-tune-costs.h
+++ b/gcc/config/i386/x86-tune-costs.h
@@ -1727,12 +1727,12 @@ struct processor_costs skylake_cost = {
   {8, 8, 8, 12, 24},			/* cost of storing SSE registers
 					   in 32,64,128,256 and 512-bit */
   6, 6,					/* SSE->integer and integer->SSE moves */
-  2, 2,				/* mask->integer and integer->mask moves */
-  {4, 4, 4},				/* cost of loading mask register
+  4, 6,				/* mask->integer and integer->mask moves */
+  {6, 6, 6},				/* cost of loading mask register
 					   in QImode, HImode, SImode.  */
-  {6, 6, 6},				/* cost if storing mask register
+  {8, 8, 8},				/* cost if storing mask register
 					   in QImode, HImode, SImode.  */
-  2,					/* cost of moving mask register.  */
+  3,					/* cost of moving mask register.  */
   /* End of register allocator costs.  */
   },


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