From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1725) id 0113D387087C; Mon, 14 Sep 2020 14:00:05 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 0113D387087C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1600092006; bh=oPYBSYU5a4fUi73J3QTcxCgdeVsAWz1CcFrAOgliPTU=; h=From:To:Subject:Date:From; b=jeCG8J6rqePXJY3IEXFgAuXLJFRoWMy+AIyHeJ2DH7CkvPupwyI0re0qqmKKk4VzY Gjq+Ue2TP5Q0/eSPbccxUfj1VrzxF9eNUAi2hOaNV35bVQehQiv4acAnWEFfYqg/nS 0BSV7uqn3TOAh/NcB+BlJDU860iT0YlPO2eLVjpw= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: William Schmidt To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/wschmidt/heads/builtins3)] rs6000: Add MMA builtins and necessary parsing support X-Act-Checkin: gcc X-Git-Author: Bill Schmidt X-Git-Refname: refs/users/wschmidt/heads/builtins3 X-Git-Oldrev: 6ef57024ce511720df308fd56b70ec2e61d05115 X-Git-Newrev: b7dff4cdeea3a536a1a695b1c44a32272f07b321 Message-Id: <20200914140006.0113D387087C@sourceware.org> Date: Mon, 14 Sep 2020 14:00:05 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 14 Sep 2020 14:00:06 -0000 https://gcc.gnu.org/g:b7dff4cdeea3a536a1a695b1c44a32272f07b321 commit b7dff4cdeea3a536a1a695b1c44a32272f07b321 Author: Bill Schmidt Date: Tue Aug 18 11:35:30 2020 -0500 rs6000: Add MMA builtins and necessary parsing support 2020-08-18 Bill Schmidt * rs6000-builtin-new.def (__builtin_vsx_xvcvbf16sp): Change vop to vuc. (__builtin_vsx_xvcvspbf16): Likewise. (mma): New stanza containing MMA builtins. * rs6000-gen-builtin.c (basetype): Add BT_VPAIR and BT_VQUAD. (MAXRESTROPNDS): New defined constant. (restr_opnd): Change array bound to MAXRESTROPNDS. (restr): Likewise. (restr_val1): Likewise. (restr_val2): Likewise. (match_type): Add support for v256 and v512 tokens. (parse_args): Support up to MAXRESTROPNDS restrictions. (complete_vector_type): Handle BT_VPAIR and BT_VQUAD. (write_decls): Handle more than two restrictions. (write_init_bif_table): Likewise. Diff: --- gcc/config/rs6000/rs6000-builtin-new.def | 203 ++++++++++++++++++++++++++++++- gcc/config/rs6000/rs6000-gen-builtins.c | 52 ++++++-- 2 files changed, 241 insertions(+), 14 deletions(-) diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def index 8586589c52b..516684d27ea 100644 --- a/gcc/config/rs6000/rs6000-builtin-new.def +++ b/gcc/config/rs6000/rs6000-builtin-new.def @@ -3111,10 +3111,10 @@ const vus __builtin_vsx_xxgenpcvm_v8hi (vus, const int <2>); XXGENPCVM_V8HI xxgenpcvm_v8hi {} - const vop __builtin_vsx_xvcvbf16sp (vop); + const vuc __builtin_vsx_xvcvbf16sp (vuc); XVCVBF16SP vsx_xvcvbf16sp {} - const vop __builtin_vsx_xvcvspbf16 (vop); + const vuc __builtin_vsx_xvcvspbf16 (vuc); XVCVSPBF16 vsx_xvcvspbf16 {} @@ -3134,6 +3134,205 @@ const unsigned long long __builtin_pextd (unsigned long long, unsigned long long); PEXTD pextd {} + +[mma] + void __builtin_mma_assemble_acc (v512 *, vuc, vuc, vuc, vuc); + ASSEMBLE_ACC mma_assemble_acc {mma} + + void __builtin_mma_assemble_pair (v256 *, vuc, vuc); + ASSEMBLE_PAIR mma_assemble_pair {mma} + + void __builtin_mma_disassemble_acc (void *, v512 *); + DISASSEMBLE_ACC nothing {mma,quad} + + void __builtin_mma_disassemble_pair (void *, v256 *); + DISASSEMBLE_PAIR nothing {mma,pair} + + void __builtin_mma_pmxvbf16ger2 (v512 *, vuc, vuc, const int<4>, const int<4>, const int<2>); + PMXVBF16GER2 mma_pmxvbf16ger2 {mma} + + void __builtin_mma_pmxvbf16ger2nn (v512 *, vuc, vuc, const int<4>, const int<4>, const int<2>); + PMXVBF16GER2NN mma_pmxvbf16ger2nn {mma,quad} + + void __builtin_mma_pmxvbf16ger2np (v512 *, vuc, vuc, const int<4>, const int<4>, const int<2>); + PMXVBF16GER2NP mma_pmxvbf16ger2np {mma,quad} + + void __builtin_mma_pmxvbf16ger2pn (v512 *, vuc, vuc, const int<4>, const int<4>, const int<2>); + PMXVBF16GER2PN mma_pmxvbf16ger2pn {mma,quad} + + void __builtin_mma_pmxvbf16ger2pp (v512 *, vuc, vuc, const int<4>, const int<4>, const int<2>); + PMXVBF16GER2PP mma_pmxvbf16ger2pp {mma,quad} + + void __builtin_mma_pmxvf16ger2 (v512 *, vuc, vuc, const int<4>, const int<4>, const int<2>); + PMXVF16GER2 mma_pmxvf16ger2 {mma} + + void __builtin_mma_pmxvf16ger2nn (v512 *, vuc, vuc, const int<4>, const int<4>, const int<2>); + PMXVF16GER2NN mma_pmxvf16ger2nn {mma,quad} + + void __builtin_mma_pmxvf16ger2np (v512 *, vuc, vuc, const int<4>, const int<4>, const int<2>); + PMXVF16GER2NP mma_pmxvf16ger2np {mma,quad} + + void __builtin_mma_pmxvf16ger2pn (v512 *, vuc, vuc, const int<4>, const int<4>, const int<2>); + PMXVF16GER2PN mma_pmxvf16ger2pn {mma,quad} + + void __builtin_mma_pmxvf16ger2pp (v512 *, vuc, vuc, const int<4>, const int<4>, const int<2>); + PMXVF16GER2PP mma_pmxvf16ger2pp {mma,quad} + + void __builtin_mma_pmxvf32ger (v512 *, vuc, vuc, const int<4>, const int<4>); + PMXVF32GER mma_pmxvf32ger {mma} + + void __builtin_mma_pmxvf32gernn (v512 *, vuc, vuc, const int<4>, const int<4>); + PMXVF32GERNN mma_pmxvf32gernn {mma,quad} + + void __builtin_mma_pmxvf32gernp (v512 *, vuc, vuc, const int<4>, const int<4>); + PMXVF32GERNP mma_pmxvf32gernp {mma,quad} + + void __builtin_mma_pmxvf32gerpn (v512 *, vuc, vuc, const int<4>, const int<4>); + PMXVF32GERPN mma_pmxvf32gerpn {mma,quad} + + void __builtin_mma_pmxvf32gerpp (v512 *, vuc, vuc, const int<4>, const int<4>); + PMXVF32GERPP mma_pmxvf32gerpp {mma,quad} + + void __builtin_mma_pmxvf64ger (v512 *, v256, vuc, const int<4>, const int<2>); + PMXVF64GER mma_pmxvf64ger {mma,pair} + + void __builtin_mma_pmxvf64gernn (v512 *, v256, vuc, const int<4>, const int<2>); + PMXVF64GERNN mma_pmxvf64gernn {mma,pair,quad} + + void __builtin_mma_pmxvf64gernp (v512 *, v256, vuc, const int<4>, const int<2>); + PMXVF64GERNP mma_pmxvf64gernp {mma,pair,quad} + + void __builtin_mma_pmxvf64gerpn (v512 *, v256, vuc, const int<4>, const int<2>); + PMXVF64GERPN mma_pmxvf64gerpn {mma,pair,quad} + + void __builtin_mma_pmxvf64gerpp (v512 *, v256, vuc, const int<4>, const int<2>); + PMXVF64GERPP mma_pmxvf64gerpp {mma,pair,quad} + + void __builtin_mma_pmxvi16ger2 (v512 *, vuc, vuc, const int<4>, const int<4>, const int<2>); + PMXVI16GER2 mma_pmxvi16ger2 {mma} + + void __builtin_mma_pmxvi16ger2pp (v512 *, vuc, vuc, const int<4>, const int<4>, const int<2>); + PMXVI16GER2PP mma_pmxvi16ger2pp {mma,quad} + + void __builtin_mma_pmxvi16ger2s (v512 *, vuc, vuc, const int<4>, const int<4>, const int<2>); + PMXVI16GER2S mma_pmxvi16ger2s {mma} + + void __builtin_mma_pmxvi16ger2spp (v512 *, vuc, vuc, const int<4>, const int<4>, const int<2>); + PMXVI16GER2SPP mma_pmxvi16ger2spp {mma,quad} + + void __builtin_mma_pmxvi4ger8 (v512 *, vuc, vuc, const int<4>, const int<4>, const int<8>); + PMXVI4GER8 mma_pmxvi4ger8 {mma} + + void __builtin_mma_pmxvi4ger8pp (v512 *, vuc, vuc, const int<4>, const int<4>, const int<4>); + PMXVI4GER8PP mma_pmxvi4ger8pp {mma,quad} + + void __builtin_mma_pmxvi8ger4 (v512 *, vuc, vuc, const int<4>, const int<4>, const int<4>); + PMXVI8GER4 mma_pmxvi8ger4 {mma} + + void __builtin_mma_pmxvi8ger4pp (v512 *, vuc, vuc, const int<4>, const int<4>, const int<4>); + PMXVI8GER4PP mma_pmxvi8ger4pp {mma,quad} + + void __builtin_mma_pmxvi8ger4spp (v512 *, vuc, vuc, const int<4>, const int<4>, const int<4>); + PMXVI8GER4SPP mma_pmxvi8ger4spp {mma,quad} + + void __builtin_mma_xvbf16ger2 (v512 *, vuc, vuc); + XVBF16GER2 mma_xvbf16ger2 {mma} + + void __builtin_mma_xvbf16ger2nn (v512 *, vuc, vuc); + XVBF16GER2NN mma_xvbf16ger2nn {mma,quad} + + void __builtin_mma_xvbf16ger2np (v512 *, vuc, vuc); + XVBF16GER2NP mma_xvbf16ger2np {mma,quad} + + void __builtin_mma_xvbf16ger2pn (v512 *, vuc, vuc); + XVBF16GER2PN mma_xvbf16ger2pn {mma,quad} + + void __builtin_mma_xvbf16ger2pp (v512 *, vuc, vuc); + XVBF16GER2PP mma_xvbf16ger2pp {mma,quad} + + void __builtin_mma_xvf16ger2 (v512 *, vuc, vuc); + XVF16GER2 mma_xvf16ger2 {mma} + + void __builtin_mma_xvf16ger2nn (v512 *, vuc, vuc); + XVF16GER2NN mma_xvf16ger2nn {mma,quad} + + void __builtin_mma_xvf16ger2np (v512 *, vuc, vuc); + XVF16GER2NP mma_xvf16ger2np {mma,quad} + + void __builtin_mma_xvf16ger2pn (v512 *, vuc, vuc); + XVF16GER2PN mma_xvf16ger2pn {mma,quad} + + void __builtin_mma_xvf16ger2pp (v512 *, vuc, vuc); + XVF16GER2PP mma_xvf16ger2pp {mma,quad} + + void __builtin_mma_xvf32ger (v512 *, vuc, vuc); + XVF32GER mma_xvf32ger {mma} + + void __builtin_mma_xvf32gernn (v512 *, vuc, vuc); + XVF32GERNN mma_xvf32gernn {mma,quad} + + void __builtin_mma_xvf32gernp (v512 *, vuc, vuc); + XVF32GERNP mma_xvf32gernp {mma,quad} + + void __builtin_mma_xvf32gerpn (v512 *, vuc, vuc); + XVF32GERPN mma_xvf32gerpn {mma,quad} + + void __builtin_mma_xvf32gerpp (v512 *, vuc, vuc); + XVF32GERPP mma_xvf32gerpp {mma,quad} + + void __builtin_mma_xvf64ger (v512 *, v256, vuc); + XVF64GER mma_xvf64ger {mma,pair} + + void __builtin_mma_xvf64gernn (v512 *, v256, vuc); + XVF64GERNN mma_xvf64gernn {mma,pair,quad} + + void __builtin_mma_xvf64gernp (v512 *, v256, vuc); + XVF64GERNP mma_xvf64gernp {mma,pair,quad} + + void __builtin_mma_xvf64gerpn (v512 *, v256, vuc); + XVF64GERPN mma_xvf64gerpn {mma,pair,quad} + + void __builtin_mma_xvf64gerpp (v512 *, v256, vuc); + XVF64GERPP mma_xvf64gerpp {mma,pair,quad} + + void __builtin_mma_xvi16ger2 (v512 *, vuc, vuc); + XVI16GER2 mma_xvi16ger2 {mma} + + void __builtin_mma_xvi16ger2pp (v512 *, vuc, vuc); + XVI16GER2PP mma_xvi16ger2pp {mma,quad} + + void __builtin_mma_xvi16ger2s (v512 *, vuc, vuc); + XVI16GER2S mma_xvi16ger2s {mma} + + void __builtin_mma_xvi16ger2spp (v512 *, vuc, vuc); + XVI16GER2SPP mma_xvi16ger2spp {mma,quad} + + void __builtin_mma_xvi4ger8 (v512 *, vuc, vuc); + XVI4GER8 mma_xvi4ger8 {mma} + + void __builtin_mma_xvi4ger8pp (v512 *, vuc, vuc); + XVI4GER8PP mma_xvi4ger8pp {mma,quad} + + void __builtin_mma_xvi8ger4 (v512 *, vuc, vuc); + XVI8GER4 mma_xvi8ger4 {mma} + + void __builtin_mma_xvi8ger4pp (v512 *, vuc, vuc); + XVI8GER4PP mma_xvi8ger4pp {mma,quad} + + void __builtin_mma_xvi8ger4spp (v512 *, vuc, vuc); + XVI8GER4SPP mma_xvi8ger4spp {mma,quad} + + void __builtin_mma_xxmfacc (v512 *); + XXMFACC mma_xxmfacc {mma,quad} + + void __builtin_mma_xxmtacc (v512 *); + XXMTACC mma_xxmtacc {mma,quad} + + void __builtin_mma_xxsetaccz (v512 *); + XXSETACCZ mma_xxsetaccz {mma} + + + ; #### We don't yet have the Darwin CfString builtin supported, but ; that has its own special handling so it should go in there, I guess. ; diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c index e77877da9c4..eb75b11dbe3 100644 --- a/gcc/config/rs6000/rs6000-gen-builtins.c +++ b/gcc/config/rs6000/rs6000-gen-builtins.c @@ -278,7 +278,9 @@ enum basetype { BT_DECIMAL32, BT_DECIMAL64, BT_DECIMAL128, - BT_IBM128 + BT_IBM128, + BT_VPAIR, + BT_VQUAD }; /* Ways in which a const int value can be restricted. RES_BITS indicates @@ -341,15 +343,16 @@ struct attrinfo { }; /* Fields associated with a function prototype (bif or overload). */ +#define MAXRESTROPNDS 3 struct prototype { typeinfo rettype; char *bifname; int nargs; typelist *args; - int restr_opnd[2]; - restriction restr[2]; - int restr_val1[2]; - int restr_val2[2]; + int restr_opnd[MAXRESTROPNDS]; + restriction restr[MAXRESTROPNDS]; + int restr_val1[MAXRESTROPNDS]; + int restr_val2[MAXRESTROPNDS]; }; /* Data associated with a builtin function, and a table of such data. */ @@ -881,6 +884,8 @@ match_type (typeinfo *typedata, int voidok) vp vector pixel vf vector float vd vector double + v256 __vector_pair + v512 __vector_quad vop opaque vector (matches all vectors) For simplicity, We don't support "short int" and "long long int". @@ -1051,6 +1056,20 @@ match_type (typeinfo *typedata, int voidok) handle_pointer (typedata); return 1; } + else if (!strcmp (token, "v256")) + { + typedata->isvector = 1; + typedata->base = BT_VPAIR; + handle_pointer (typedata); + return 1; + } + else if (!strcmp (token, "v512")) + { + typedata->isvector = 1; + typedata->base = BT_VQUAD; + handle_pointer (typedata); + return 1; + } else if (!strcmp (token, "vop")) { typedata->isopaque = 1; @@ -1172,9 +1191,9 @@ parse_args (prototype *protoptr) { if (argtype->restr) { - if (restr_cnt >= 2) + if (restr_cnt >= MAXRESTROPNDS) { - (*diag) ("More than two restricted operands\n"); + (*diag) ("More than two %d operands\n", MAXRESTROPNDS); return PC_PARSEFAIL; } restr_opnd[restr_cnt] = *nargs + 1; @@ -1368,6 +1387,14 @@ complete_vector_type (typeinfo *typeptr, char *buf, int *bufi) memcpy (&buf[*bufi], "1tf", 3); *bufi += 3; break; + case BT_VPAIR: + memcpy (&buf[*bufi], "1poi", 4); + *bufi += 4; + break; + case BT_VQUAD: + memcpy (&buf[*bufi], "1pxi", 4); + *bufi += 4; + break; default: (*diag) ("unhandled basetype %d.\n", typeptr->base); exit (EC_INTERR); @@ -2003,6 +2030,7 @@ write_decls () fprintf (header_file, " ENB_MMA\n"); fprintf (header_file, "};\n\n"); + fprintf (header_file, "#define PPC_MAXRESTROPNDS 3\n"); fprintf (header_file, "struct bifdata\n"); fprintf (header_file, "{\n"); fprintf (header_file, " const char *bifname;\n"); @@ -2011,10 +2039,10 @@ write_decls () fprintf (header_file, " insn_code icode;\n"); fprintf (header_file, " int nargs;\n"); fprintf (header_file, " int bifattrs;\n"); - fprintf (header_file, " int restr_opnd[2];\n"); - fprintf (header_file, " restriction restr[2];\n"); - fprintf (header_file, " int restr_val1[2];\n"); - fprintf (header_file, " int restr_val2[2];\n"); + fprintf (header_file, " int restr_opnd[PPC_MAXRESTROPNDS];\n"); + fprintf (header_file, " restriction restr[PPC_MAXRESTROPNDS];\n"); + fprintf (header_file, " int restr_val1[PPC_MAXRESTROPNDS];\n"); + fprintf (header_file, " int restr_val2[PPC_MAXRESTROPNDS];\n"); fprintf (header_file, "};\n\n"); fprintf (header_file, "#define bif_init_bit\t\t(0x00000001)\n"); @@ -2292,7 +2320,7 @@ write_init_bif_table () if (bifs[i].attrs.isldstmask) fprintf (init_file, " | bif_ldstmask_bit"); fprintf (init_file, ";\n"); - for (int j = 0; j < 1; j++) + for (int j = 0; j < MAXRESTROPNDS; j++) { fprintf (init_file, " rs6000_builtin_info_x[RS6000_BIF_%s].restr_opnd[%d]"