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* [gcc r10-8765] i386: Fix up vector mul and div with broadcasts in -masm=intel mode
@ 2020-09-15 8:29 Jakub Jelinek
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From: Jakub Jelinek @ 2020-09-15 8:29 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:55cd12c65ffa1e7c0bb36fd398f178d5d15d660f
commit r10-8765-g55cd12c65ffa1e7c0bb36fd398f178d5d15d660f
Author: Jakub Jelinek <jakub@redhat.com>
Date: Tue Sep 15 09:37:48 2020 +0200
i386: Fix up vector mul and div with broadcasts in -masm=intel mode
These patterns printed bogus <>s around the {1to16} and similar strings.
2020-09-15 Jakub Jelinek <jakub@redhat.com>
PR target/97028
* config/i386/sse.md (mul<mode>3<mask_name>_bcs,
<avx512>_div<mode>3<mask_name>_bcst): Use <avx512bcst> instead of
<<avx512bcst>>.
* gcc.target/i386/avx512f-pr97028.c: Untested fix.
(cherry picked from commit 0f079e104a8d1994b6b47169a6b45737615eb2d7)
Diff:
---
gcc/config/i386/sse.md | 4 ++--
gcc/testsuite/gcc.target/i386/avx512f-pr97028.c | 18 ++++++++++++++++++
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index eb6a906c8b2..e8ed38fa0da 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -1814,7 +1814,7 @@
(match_operand:<ssescalarmode> 1 "memory_operand" "m"))
(match_operand:VF_AVX512 2 "register_operand" "v")))]
"TARGET_AVX512F && <mask_mode512bit_condition>"
- "vmul<ssemodesuffix>\t{%1<avx512bcst>, %2, %0<mask_operand3>|%0<mask_operand3>, %2, %1<<avx512bcst>>}"
+ "vmul<ssemodesuffix>\t{%1<avx512bcst>, %2, %0<mask_operand3>|%0<mask_operand3>, %2, %1<avx512bcst>}"
[(set_attr "prefix" "evex")
(set_attr "type" "ssemul")
(set_attr "mode" "<MODE>")])
@@ -1907,7 +1907,7 @@
(vec_duplicate:VF_AVX512
(match_operand:<ssescalarmode> 2 "memory_operand" "m"))))]
"TARGET_AVX512F && <mask_mode512bit_condition>"
- "vdiv<ssemodesuffix>\t{%2<avx512bcst>, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2<<avx512bcst>>}"
+ "vdiv<ssemodesuffix>\t{%2<avx512bcst>, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2<avx512bcst>}"
[(set_attr "prefix" "evex")
(set_attr "type" "ssediv")
(set_attr "mode" "<MODE>")])
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-pr97028.c b/gcc/testsuite/gcc.target/i386/avx512f-pr97028.c
new file mode 100644
index 00000000000..2719108a411
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-pr97028.c
@@ -0,0 +1,18 @@
+/* PR target/97028 */
+/* { dg-do assemble { target avx512f } } */
+/* { dg-require-effective-target masm_intel } */
+/* { dg-options "-O2 -mavx512f -masm=intel" } */
+
+#include <x86intrin.h>
+
+__m512
+foo (__m512 x, float *y)
+{
+ return _mm512_mul_ps (x, _mm512_set1_ps (*y));
+}
+
+__m512
+bar (__m512 x, float *y)
+{
+ return _mm512_div_ps (x, _mm512_set1_ps (*y));
+}
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