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* [gcc(refs/users/meissner/heads/work017)] PowerPC: Map power10 __float128 built-ins to long double if long double is IEEE.
@ 2020-09-16 3:52 Michael Meissner
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From: Michael Meissner @ 2020-09-16 3:52 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:41c84f5472a130e21dc0370a7bc9d2a9fbcf73fd
commit 41c84f5472a130e21dc0370a7bc9d2a9fbcf73fd
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Tue Sep 15 23:50:45 2020 -0400
PowerPC: Map power10 __float128 built-ins to long double if long double is IEEE.
gcc/
2020-09-15 Michael Meissner <meissner@linux.ibm.com>
* config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
built-in functions for long double built-ins that use IEEE
128-bit.
(rs6000_expand_builtin): Change the KF IEEE 128-bit comparison
insns to TF if long double is IEEE 128-bit.
* config/rs6000/rs6000-builtin.def (scalar_extract_exptf): Add
support for long double being IEEE 128-bit built-in functions.
(scalar_extract_sigtf): Likewise.
(scalar_test_neg_tf): Likewise.
(scalar_insert_exp_tf): Likewise.
(scalar_insert_exp_tfp): Likewise.
(scalar_cmp_exp_tf_gt): Likewise.
(scalar_cmp_exp_tf_lt): Likewise.
(scalar_cmp_exp_tf_eq): Likewise.
(scalar_cmp_exp_tf_unordered): Likewise.
(scalar_test_data_class_tf): Likewise.
Diff:
---
gcc/config/rs6000/rs6000-builtin.def | 11 ++++++++++
gcc/config/rs6000/rs6000-call.c | 40 ++++++++++++++++++++++++++++++++++++
2 files changed, 51 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def
index e91a48ddf5f..7d52961c8cf 100644
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -2401,8 +2401,11 @@ BU_P9V_64BIT_VSX_1 (VSESDP, "scalar_extract_sig", CONST, xsxsigdp)
BU_FLOAT128_HW_VSX_1 (VSEEQP, "scalar_extract_expq", CONST, xsxexpqp_kf)
BU_FLOAT128_HW_VSX_1 (VSESQP, "scalar_extract_sigq", CONST, xsxsigqp_kf)
+BU_FLOAT128_HW_VSX_1 (VSEETF, "scalar_extract_exptf", CONST, xsxexpqp_tf)
+BU_FLOAT128_HW_VSX_1 (VSESTF, "scalar_extract_sigtf", CONST, xsxsigqp_tf)
BU_FLOAT128_HW_VSX_1 (VSTDCNQP, "scalar_test_neg_qp", CONST, xststdcnegqp_kf)
+BU_FLOAT128_HW_VSX_1 (VSTDCNTF, "scalar_test_neg_tf", CONST, xststdcnegqp_tf)
BU_P9V_VSX_1 (VSTDCNDP, "scalar_test_neg_dp", CONST, xststdcnegdp)
BU_P9V_VSX_1 (VSTDCNSP, "scalar_test_neg_sp", CONST, xststdcnegsp)
@@ -2420,6 +2423,8 @@ BU_P9V_64BIT_VSX_2 (VSIEDPF, "scalar_insert_exp_dp", CONST, xsiexpdpf)
BU_FLOAT128_HW_VSX_2 (VSIEQP, "scalar_insert_exp_q", CONST, xsiexpqp_kf)
BU_FLOAT128_HW_VSX_2 (VSIEQPF, "scalar_insert_exp_qp", CONST, xsiexpqpf_kf)
+BU_FLOAT128_HW_VSX_2 (VSIETF, "scalar_insert_exp_tf", CONST, xsiexpqp_tf)
+BU_FLOAT128_HW_VSX_2 (VSIETFF, "scalar_insert_exp_tfp", CONST, xsiexpqpf_tf)
BU_P9V_VSX_2 (VSCEDPGT, "scalar_cmp_exp_dp_gt", CONST, xscmpexpdp_gt)
BU_P9V_VSX_2 (VSCEDPLT, "scalar_cmp_exp_dp_lt", CONST, xscmpexpdp_lt)
@@ -2431,7 +2436,13 @@ BU_P9V_VSX_2 (VSCEQPLT, "scalar_cmp_exp_qp_lt", CONST, xscmpexpqp_lt_kf)
BU_P9V_VSX_2 (VSCEQPEQ, "scalar_cmp_exp_qp_eq", CONST, xscmpexpqp_eq_kf)
BU_P9V_VSX_2 (VSCEQPUO, "scalar_cmp_exp_qp_unordered", CONST, xscmpexpqp_unordered_kf)
+BU_P9V_VSX_2 (VSCETFGT, "scalar_cmp_exp_tf_gt", CONST, xscmpexpqp_gt_tf)
+BU_P9V_VSX_2 (VSCETFLT, "scalar_cmp_exp_tf_lt", CONST, xscmpexpqp_lt_tf)
+BU_P9V_VSX_2 (VSCETFEQ, "scalar_cmp_exp_tf_eq", CONST, xscmpexpqp_eq_tf)
+BU_P9V_VSX_2 (VSCETFUO, "scalar_cmp_exp_tf_unordered", CONST, xscmpexpqp_unordered_tf)
+
BU_FLOAT128_HW_VSX_2 (VSTDCQP, "scalar_test_data_class_qp", CONST, xststdcqp_kf)
+BU_FLOAT128_HW_VSX_2 (VSTDCTF, "scalar_test_data_class_tf", CONST, xststdcqp_tf)
BU_P9V_VSX_2 (VSTDCDP, "scalar_test_data_class_dp", CONST, xststdcdp)
BU_P9V_VSX_2 (VSTDCSP, "scalar_test_data_class_sp", CONST, xststdcsp)
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index 77c7a1149fb..0460280f91a 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -4587,6 +4587,8 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
RS6000_BTI_bool_int, RS6000_BTI_double, RS6000_BTI_INTSI, 0 },
{ P9V_BUILTIN_VEC_VSTDC, P9V_BUILTIN_VSTDCQP,
RS6000_BTI_bool_int, RS6000_BTI_ieee128_float, RS6000_BTI_INTSI, 0 },
+ { P9V_BUILTIN_VEC_VSTDC, P9V_BUILTIN_VSTDCTF,
+ RS6000_BTI_bool_int, RS6000_BTI_long_double, RS6000_BTI_INTSI, 0 },
{ P9V_BUILTIN_VEC_VSTDCSP, P9V_BUILTIN_VSTDCSP,
RS6000_BTI_bool_int, RS6000_BTI_float, RS6000_BTI_INTSI, 0 },
@@ -4594,6 +4596,8 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
RS6000_BTI_bool_int, RS6000_BTI_double, RS6000_BTI_INTSI, 0 },
{ P9V_BUILTIN_VEC_VSTDCQP, P9V_BUILTIN_VSTDCQP,
RS6000_BTI_bool_int, RS6000_BTI_ieee128_float, RS6000_BTI_INTSI, 0 },
+ { P9V_BUILTIN_VEC_VSTDCQP, P9V_BUILTIN_VSTDCTF,
+ RS6000_BTI_bool_int, RS6000_BTI_long_double, RS6000_BTI_INTSI, 0 },
{ P9V_BUILTIN_VEC_VSTDCN, P9V_BUILTIN_VSTDCNSP,
RS6000_BTI_bool_int, RS6000_BTI_float, 0, 0 },
@@ -4601,6 +4605,8 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
RS6000_BTI_bool_int, RS6000_BTI_double, 0, 0 },
{ P9V_BUILTIN_VEC_VSTDCN, P9V_BUILTIN_VSTDCNQP,
RS6000_BTI_bool_int, RS6000_BTI_ieee128_float, 0, 0 },
+ { P9V_BUILTIN_VEC_VSTDCN, P9V_BUILTIN_VSTDCNTF,
+ RS6000_BTI_bool_int, RS6000_BTI_long_double, 0, 0 },
{ P9V_BUILTIN_VEC_VSTDCNSP, P9V_BUILTIN_VSTDCNSP,
RS6000_BTI_bool_int, RS6000_BTI_float, 0, 0 },
@@ -4608,16 +4614,22 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
RS6000_BTI_bool_int, RS6000_BTI_double, 0, 0 },
{ P9V_BUILTIN_VEC_VSTDCNQP, P9V_BUILTIN_VSTDCNQP,
RS6000_BTI_bool_int, RS6000_BTI_ieee128_float, 0, 0 },
+ { P9V_BUILTIN_VEC_VSTDCNQP, P9V_BUILTIN_VSTDCNTF,
+ RS6000_BTI_bool_int, RS6000_BTI_long_double, 0, 0 },
{ P9V_BUILTIN_VEC_VSEEDP, P9V_BUILTIN_VSEEDP,
RS6000_BTI_UINTSI, RS6000_BTI_double, 0, 0 },
{ P9V_BUILTIN_VEC_VSEEDP, P9V_BUILTIN_VSEEQP,
RS6000_BTI_UINTDI, RS6000_BTI_ieee128_float, 0, 0 },
+ { P9V_BUILTIN_VEC_VSEEDP, P9V_BUILTIN_VSEETF,
+ RS6000_BTI_UINTDI, RS6000_BTI_long_double, 0, 0 },
{ P9V_BUILTIN_VEC_VSESDP, P9V_BUILTIN_VSESDP,
RS6000_BTI_UINTDI, RS6000_BTI_double, 0, 0 },
{ P9V_BUILTIN_VEC_VSESDP, P9V_BUILTIN_VSESQP,
RS6000_BTI_UINTTI, RS6000_BTI_ieee128_float, 0, 0 },
+ { P9V_BUILTIN_VEC_VSESDP, P9V_BUILTIN_VSESTF,
+ RS6000_BTI_UINTTI, RS6000_BTI_long_double, 0, 0 },
{ P9V_BUILTIN_VEC_VSIEDP, P9V_BUILTIN_VSIEDP,
RS6000_BTI_double, RS6000_BTI_UINTDI, RS6000_BTI_UINTDI, 0 },
@@ -4626,25 +4638,37 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
{ P9V_BUILTIN_VEC_VSIEDP, P9V_BUILTIN_VSIEQP,
RS6000_BTI_ieee128_float, RS6000_BTI_UINTTI, RS6000_BTI_UINTDI, 0 },
+ { P9V_BUILTIN_VEC_VSIEDP, P9V_BUILTIN_VSIETF,
+ RS6000_BTI_long_double, RS6000_BTI_UINTTI, RS6000_BTI_UINTDI, 0 },
{ P9V_BUILTIN_VEC_VSIEDP, P9V_BUILTIN_VSIEQPF,
RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, RS6000_BTI_UINTDI, 0 },
+ { P9V_BUILTIN_VEC_VSIEDP, P9V_BUILTIN_VSIETFF,
+ RS6000_BTI_long_double, RS6000_BTI_long_double, RS6000_BTI_UINTDI, 0 },
{ P9V_BUILTIN_VEC_VSCEGT, P9V_BUILTIN_VSCEDPGT,
RS6000_BTI_INTSI, RS6000_BTI_double, RS6000_BTI_double, 0 },
{ P9V_BUILTIN_VEC_VSCEGT, P9V_BUILTIN_VSCEQPGT,
RS6000_BTI_INTSI, RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, 0 },
+ { P9V_BUILTIN_VEC_VSCEGT, P9V_BUILTIN_VSCETFGT,
+ RS6000_BTI_INTSI, RS6000_BTI_long_double, RS6000_BTI_long_double, 0 },
{ P9V_BUILTIN_VEC_VSCELT, P9V_BUILTIN_VSCEDPLT,
RS6000_BTI_INTSI, RS6000_BTI_double, RS6000_BTI_double, 0 },
{ P9V_BUILTIN_VEC_VSCELT, P9V_BUILTIN_VSCEQPLT,
RS6000_BTI_INTSI, RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, 0 },
+ { P9V_BUILTIN_VEC_VSCELT, P9V_BUILTIN_VSCETFLT,
+ RS6000_BTI_INTSI, RS6000_BTI_long_double, RS6000_BTI_long_double, 0 },
{ P9V_BUILTIN_VEC_VSCEEQ, P9V_BUILTIN_VSCEDPEQ,
RS6000_BTI_INTSI, RS6000_BTI_double, RS6000_BTI_double, 0 },
{ P9V_BUILTIN_VEC_VSCEEQ, P9V_BUILTIN_VSCEQPEQ,
RS6000_BTI_INTSI, RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, 0 },
+ { P9V_BUILTIN_VEC_VSCEEQ, P9V_BUILTIN_VSCETFEQ,
+ RS6000_BTI_INTSI, RS6000_BTI_long_double, RS6000_BTI_long_double, 0 },
{ P9V_BUILTIN_VEC_VSCEUO, P9V_BUILTIN_VSCEDPUO,
RS6000_BTI_INTSI, RS6000_BTI_double, RS6000_BTI_double, 0 },
{ P9V_BUILTIN_VEC_VSCEUO, P9V_BUILTIN_VSCEQPUO,
RS6000_BTI_INTSI, RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, 0 },
+ { P9V_BUILTIN_VEC_VSCEUO, P9V_BUILTIN_VSCETFUO,
+ RS6000_BTI_INTSI, RS6000_BTI_long_double, RS6000_BTI_long_double, 0 },
{ P9V_BUILTIN_VEC_XL_LEN_R, P9V_BUILTIN_XL_LEN_R,
RS6000_BTI_unsigned_V16QI, ~RS6000_BTI_UINTQI,
@@ -12534,6 +12558,22 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
case CODE_FOR_xsiexpqp_kf: icode = CODE_FOR_xsiexpqp_tf; break;
case CODE_FOR_xsiexpqpf_kf: icode = CODE_FOR_xsiexpqpf_tf; break;
case CODE_FOR_xststdcqp_kf: icode = CODE_FOR_xststdcqp_tf; break;
+
+ case CODE_FOR_xscmpexpqp_eq_kf:
+ icode = CODE_FOR_xscmpexpqp_eq_tf;
+ break;
+
+ case CODE_FOR_xscmpexpqp_lt_kf:
+ icode = CODE_FOR_xscmpexpqp_lt_tf;
+ break;
+
+ case CODE_FOR_xscmpexpqp_gt_kf:
+ icode = CODE_FOR_xscmpexpqp_gt_tf;
+ break;
+
+ case CODE_FOR_xscmpexpqp_unordered_kf:
+ icode = CODE_FOR_xscmpexpqp_unordered_tf;
+ break;
}
if (TARGET_DEBUG_BUILTIN)
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