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* [gcc(refs/users/wschmidt/heads/builtins3)] rs6000: Add Power7 builtins
@ 2020-09-16 21:30 William Schmidt
0 siblings, 0 replies; 10+ messages in thread
From: William Schmidt @ 2020-09-16 21:30 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:20e7e6abbd851864f74bec97abba6f8a72294a59
commit 20e7e6abbd851864f74bec97abba6f8a72294a59
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Wed Jun 17 11:32:04 2020 -0500
rs6000: Add Power7 builtins
2020-07-26 Bill Schmidt <wschmidt@linux.ibm.com>
* config/rs6000/rs6000-builtin-new.def: Add power7 and
power7-64 builtins.
Diff:
---
gcc/config/rs6000/rs6000-builtin-new.def | 39 ++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 1cb019bd4fb..0a17cad446c 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -1938,3 +1938,42 @@
XXSPLTD_V2DI vsx_xxspltd_v2di {}
+; Power7 builtins (ISA 2.06).
+[power7]
+ const unsigned int __builtin_addg6s (unsigned int, unsigned int);
+ ADDG6S addg6s {}
+
+ const signed long long __builtin_bpermd (signed long long, signed long long);
+ BPERMD bpermd_di {}
+
+ const unsigned int __builtin_cbcdtd (unsigned int);
+ CBCDTD cbcdtd {}
+
+ const unsigned int __builtin_cdtbcd (unsigned int);
+ CDTBCD cdtbcd {}
+
+ const signed int __builtin_divwe (signed int, signed int);
+ DIVWE dive_si {}
+
+ const unsigned int __builtin_divweu (unsigned int, unsigned int);
+ DIVWEU diveu_si {}
+
+ const vsq __builtin_pack_vector_int128 (unsigned long long, unsigned long long);
+ PACK_V1TI packv1ti {}
+
+ void __builtin_ppc_speculation_barrier ();
+ SPECBARR speculation_barrier {}
+
+ const unsigned long long __builtin_unpack_vector_int128 (vsq, const int<1>);
+ UNPACK_V1TI unpackv1ti {}
+
+
+; Power7 builtins requiring 64-bit GPRs (even with 32-bit addressing).
+[power7-64]
+ const signed long long __builtin_divde (signed long long, signed long long);
+ DIVDE dive_di {}
+
+ const unsigned long long __builtin_divdeu (unsigned long long, unsigned long long);
+ DIVDEU diveu_di {}
+
+
^ permalink raw reply [flat|nested] 10+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins3)] rs6000: Add Power7 builtins
@ 2020-10-29 19:51 William Schmidt
0 siblings, 0 replies; 10+ messages in thread
From: William Schmidt @ 2020-10-29 19:51 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:864eb6f589504229b8ac743f3c390d3c7dbba618
commit 864eb6f589504229b8ac743f3c390d3c7dbba618
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Wed Jun 17 11:32:04 2020 -0500
rs6000: Add Power7 builtins
2020-07-26 Bill Schmidt <wschmidt@linux.ibm.com>
* config/rs6000/rs6000-builtin-new.def: Add power7 and
power7-64 builtins.
Diff:
---
gcc/config/rs6000/rs6000-builtin-new.def | 39 ++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 1cb019bd4fb..0a17cad446c 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -1938,3 +1938,42 @@
XXSPLTD_V2DI vsx_xxspltd_v2di {}
+; Power7 builtins (ISA 2.06).
+[power7]
+ const unsigned int __builtin_addg6s (unsigned int, unsigned int);
+ ADDG6S addg6s {}
+
+ const signed long long __builtin_bpermd (signed long long, signed long long);
+ BPERMD bpermd_di {}
+
+ const unsigned int __builtin_cbcdtd (unsigned int);
+ CBCDTD cbcdtd {}
+
+ const unsigned int __builtin_cdtbcd (unsigned int);
+ CDTBCD cdtbcd {}
+
+ const signed int __builtin_divwe (signed int, signed int);
+ DIVWE dive_si {}
+
+ const unsigned int __builtin_divweu (unsigned int, unsigned int);
+ DIVWEU diveu_si {}
+
+ const vsq __builtin_pack_vector_int128 (unsigned long long, unsigned long long);
+ PACK_V1TI packv1ti {}
+
+ void __builtin_ppc_speculation_barrier ();
+ SPECBARR speculation_barrier {}
+
+ const unsigned long long __builtin_unpack_vector_int128 (vsq, const int<1>);
+ UNPACK_V1TI unpackv1ti {}
+
+
+; Power7 builtins requiring 64-bit GPRs (even with 32-bit addressing).
+[power7-64]
+ const signed long long __builtin_divde (signed long long, signed long long);
+ DIVDE dive_di {}
+
+ const unsigned long long __builtin_divdeu (unsigned long long, unsigned long long);
+ DIVDEU diveu_di {}
+
+
^ permalink raw reply [flat|nested] 10+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins3)] rs6000: Add Power7 builtins
@ 2020-10-27 16:28 William Schmidt
0 siblings, 0 replies; 10+ messages in thread
From: William Schmidt @ 2020-10-27 16:28 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:61956d7caa39bcf8e0ae22640b3de7f4573b8561
commit 61956d7caa39bcf8e0ae22640b3de7f4573b8561
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Wed Jun 17 11:32:04 2020 -0500
rs6000: Add Power7 builtins
2020-07-26 Bill Schmidt <wschmidt@linux.ibm.com>
* config/rs6000/rs6000-builtin-new.def: Add power7 and
power7-64 builtins.
Diff:
---
gcc/config/rs6000/rs6000-builtin-new.def | 39 ++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 1cb019bd4fb..0a17cad446c 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -1938,3 +1938,42 @@
XXSPLTD_V2DI vsx_xxspltd_v2di {}
+; Power7 builtins (ISA 2.06).
+[power7]
+ const unsigned int __builtin_addg6s (unsigned int, unsigned int);
+ ADDG6S addg6s {}
+
+ const signed long long __builtin_bpermd (signed long long, signed long long);
+ BPERMD bpermd_di {}
+
+ const unsigned int __builtin_cbcdtd (unsigned int);
+ CBCDTD cbcdtd {}
+
+ const unsigned int __builtin_cdtbcd (unsigned int);
+ CDTBCD cdtbcd {}
+
+ const signed int __builtin_divwe (signed int, signed int);
+ DIVWE dive_si {}
+
+ const unsigned int __builtin_divweu (unsigned int, unsigned int);
+ DIVWEU diveu_si {}
+
+ const vsq __builtin_pack_vector_int128 (unsigned long long, unsigned long long);
+ PACK_V1TI packv1ti {}
+
+ void __builtin_ppc_speculation_barrier ();
+ SPECBARR speculation_barrier {}
+
+ const unsigned long long __builtin_unpack_vector_int128 (vsq, const int<1>);
+ UNPACK_V1TI unpackv1ti {}
+
+
+; Power7 builtins requiring 64-bit GPRs (even with 32-bit addressing).
+[power7-64]
+ const signed long long __builtin_divde (signed long long, signed long long);
+ DIVDE dive_di {}
+
+ const unsigned long long __builtin_divdeu (unsigned long long, unsigned long long);
+ DIVDEU diveu_di {}
+
+
^ permalink raw reply [flat|nested] 10+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins3)] rs6000: Add Power7 builtins
@ 2020-09-14 13:58 William Schmidt
0 siblings, 0 replies; 10+ messages in thread
From: William Schmidt @ 2020-09-14 13:58 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:61306fe65f57d79ba23e0dc0ba92d10a5df7666a
commit 61306fe65f57d79ba23e0dc0ba92d10a5df7666a
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Wed Jun 17 11:32:04 2020 -0500
rs6000: Add Power7 builtins
2020-07-26 Bill Schmidt <wschmidt@linux.ibm.com>
* config/rs6000/rs6000-builtin-new.def: Add power7 and
power7-64 builtins.
Diff:
---
gcc/config/rs6000/rs6000-builtin-new.def | 39 ++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 1cb019bd4fb..0a17cad446c 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -1938,3 +1938,42 @@
XXSPLTD_V2DI vsx_xxspltd_v2di {}
+; Power7 builtins (ISA 2.06).
+[power7]
+ const unsigned int __builtin_addg6s (unsigned int, unsigned int);
+ ADDG6S addg6s {}
+
+ const signed long long __builtin_bpermd (signed long long, signed long long);
+ BPERMD bpermd_di {}
+
+ const unsigned int __builtin_cbcdtd (unsigned int);
+ CBCDTD cbcdtd {}
+
+ const unsigned int __builtin_cdtbcd (unsigned int);
+ CDTBCD cdtbcd {}
+
+ const signed int __builtin_divwe (signed int, signed int);
+ DIVWE dive_si {}
+
+ const unsigned int __builtin_divweu (unsigned int, unsigned int);
+ DIVWEU diveu_si {}
+
+ const vsq __builtin_pack_vector_int128 (unsigned long long, unsigned long long);
+ PACK_V1TI packv1ti {}
+
+ void __builtin_ppc_speculation_barrier ();
+ SPECBARR speculation_barrier {}
+
+ const unsigned long long __builtin_unpack_vector_int128 (vsq, const int<1>);
+ UNPACK_V1TI unpackv1ti {}
+
+
+; Power7 builtins requiring 64-bit GPRs (even with 32-bit addressing).
+[power7-64]
+ const signed long long __builtin_divde (signed long long, signed long long);
+ DIVDE dive_di {}
+
+ const unsigned long long __builtin_divdeu (unsigned long long, unsigned long long);
+ DIVDEU diveu_di {}
+
+
^ permalink raw reply [flat|nested] 10+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins3)] rs6000: Add Power7 builtins
@ 2020-08-28 20:08 William Schmidt
0 siblings, 0 replies; 10+ messages in thread
From: William Schmidt @ 2020-08-28 20:08 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:20daa084af5eee545279bc990dda5a32b93a938a
commit 20daa084af5eee545279bc990dda5a32b93a938a
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Wed Jun 17 11:32:04 2020 -0500
rs6000: Add Power7 builtins
2020-07-26 Bill Schmidt <wschmidt@linux.ibm.com>
* config/rs6000/rs6000-builtin-new.def: Add power7 and
power7-64 builtins.
Diff:
---
gcc/config/rs6000/rs6000-builtin-new.def | 39 ++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 1cb019bd4fb..0a17cad446c 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -1938,3 +1938,42 @@
XXSPLTD_V2DI vsx_xxspltd_v2di {}
+; Power7 builtins (ISA 2.06).
+[power7]
+ const unsigned int __builtin_addg6s (unsigned int, unsigned int);
+ ADDG6S addg6s {}
+
+ const signed long long __builtin_bpermd (signed long long, signed long long);
+ BPERMD bpermd_di {}
+
+ const unsigned int __builtin_cbcdtd (unsigned int);
+ CBCDTD cbcdtd {}
+
+ const unsigned int __builtin_cdtbcd (unsigned int);
+ CDTBCD cdtbcd {}
+
+ const signed int __builtin_divwe (signed int, signed int);
+ DIVWE dive_si {}
+
+ const unsigned int __builtin_divweu (unsigned int, unsigned int);
+ DIVWEU diveu_si {}
+
+ const vsq __builtin_pack_vector_int128 (unsigned long long, unsigned long long);
+ PACK_V1TI packv1ti {}
+
+ void __builtin_ppc_speculation_barrier ();
+ SPECBARR speculation_barrier {}
+
+ const unsigned long long __builtin_unpack_vector_int128 (vsq, const int<1>);
+ UNPACK_V1TI unpackv1ti {}
+
+
+; Power7 builtins requiring 64-bit GPRs (even with 32-bit addressing).
+[power7-64]
+ const signed long long __builtin_divde (signed long long, signed long long);
+ DIVDE dive_di {}
+
+ const unsigned long long __builtin_divdeu (unsigned long long, unsigned long long);
+ DIVDEU diveu_di {}
+
+
^ permalink raw reply [flat|nested] 10+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins3)] rs6000: Add Power7 builtins
@ 2020-08-20 16:39 William Schmidt
0 siblings, 0 replies; 10+ messages in thread
From: William Schmidt @ 2020-08-20 16:39 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:0867f6bbf8187c4bd653c858d9f08a9fe32acdb9
commit 0867f6bbf8187c4bd653c858d9f08a9fe32acdb9
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Wed Jun 17 11:32:04 2020 -0500
rs6000: Add Power7 builtins
2020-07-26 Bill Schmidt <wschmidt@linux.ibm.com>
* config/rs6000/rs6000-builtin-new.def: Add power7 and
power7-64 builtins.
Diff:
---
gcc/config/rs6000/rs6000-builtin-new.def | 39 ++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 1cb019bd4fb..0a17cad446c 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -1938,3 +1938,42 @@
XXSPLTD_V2DI vsx_xxspltd_v2di {}
+; Power7 builtins (ISA 2.06).
+[power7]
+ const unsigned int __builtin_addg6s (unsigned int, unsigned int);
+ ADDG6S addg6s {}
+
+ const signed long long __builtin_bpermd (signed long long, signed long long);
+ BPERMD bpermd_di {}
+
+ const unsigned int __builtin_cbcdtd (unsigned int);
+ CBCDTD cbcdtd {}
+
+ const unsigned int __builtin_cdtbcd (unsigned int);
+ CDTBCD cdtbcd {}
+
+ const signed int __builtin_divwe (signed int, signed int);
+ DIVWE dive_si {}
+
+ const unsigned int __builtin_divweu (unsigned int, unsigned int);
+ DIVWEU diveu_si {}
+
+ const vsq __builtin_pack_vector_int128 (unsigned long long, unsigned long long);
+ PACK_V1TI packv1ti {}
+
+ void __builtin_ppc_speculation_barrier ();
+ SPECBARR speculation_barrier {}
+
+ const unsigned long long __builtin_unpack_vector_int128 (vsq, const int<1>);
+ UNPACK_V1TI unpackv1ti {}
+
+
+; Power7 builtins requiring 64-bit GPRs (even with 32-bit addressing).
+[power7-64]
+ const signed long long __builtin_divde (signed long long, signed long long);
+ DIVDE dive_di {}
+
+ const unsigned long long __builtin_divdeu (unsigned long long, unsigned long long);
+ DIVDEU diveu_di {}
+
+
^ permalink raw reply [flat|nested] 10+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins3)] rs6000: Add Power7 builtins
@ 2020-08-18 18:45 William Schmidt
0 siblings, 0 replies; 10+ messages in thread
From: William Schmidt @ 2020-08-18 18:45 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:b4a647c98e1d5fcfbbb2fc34e1008ffe09776453
commit b4a647c98e1d5fcfbbb2fc34e1008ffe09776453
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Wed Jun 17 11:32:04 2020 -0500
rs6000: Add Power7 builtins
2020-07-26 Bill Schmidt <wschmidt@linux.ibm.com>
* config/rs6000/rs6000-builtin-new.def: Add power7 and
power7-64 builtins.
Diff:
---
gcc/config/rs6000/rs6000-builtin-new.def | 39 ++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 1cb019bd4fb..0a17cad446c 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -1938,3 +1938,42 @@
XXSPLTD_V2DI vsx_xxspltd_v2di {}
+; Power7 builtins (ISA 2.06).
+[power7]
+ const unsigned int __builtin_addg6s (unsigned int, unsigned int);
+ ADDG6S addg6s {}
+
+ const signed long long __builtin_bpermd (signed long long, signed long long);
+ BPERMD bpermd_di {}
+
+ const unsigned int __builtin_cbcdtd (unsigned int);
+ CBCDTD cbcdtd {}
+
+ const unsigned int __builtin_cdtbcd (unsigned int);
+ CDTBCD cdtbcd {}
+
+ const signed int __builtin_divwe (signed int, signed int);
+ DIVWE dive_si {}
+
+ const unsigned int __builtin_divweu (unsigned int, unsigned int);
+ DIVWEU diveu_si {}
+
+ const vsq __builtin_pack_vector_int128 (unsigned long long, unsigned long long);
+ PACK_V1TI packv1ti {}
+
+ void __builtin_ppc_speculation_barrier ();
+ SPECBARR speculation_barrier {}
+
+ const unsigned long long __builtin_unpack_vector_int128 (vsq, const int<1>);
+ UNPACK_V1TI unpackv1ti {}
+
+
+; Power7 builtins requiring 64-bit GPRs (even with 32-bit addressing).
+[power7-64]
+ const signed long long __builtin_divde (signed long long, signed long long);
+ DIVDE dive_di {}
+
+ const unsigned long long __builtin_divdeu (unsigned long long, unsigned long long);
+ DIVDEU diveu_di {}
+
+
^ permalink raw reply [flat|nested] 10+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins3)] rs6000: Add Power7 builtins
@ 2020-07-27 18:48 William Schmidt
0 siblings, 0 replies; 10+ messages in thread
From: William Schmidt @ 2020-07-27 18:48 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:87bf0201bda42d9a6ca863762f456c2fab13d800
commit 87bf0201bda42d9a6ca863762f456c2fab13d800
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Wed Jun 17 11:32:04 2020 -0500
rs6000: Add Power7 builtins
2020-07-26 Bill Schmidt <wschmidt@linux.ibm.com>
* config/rs6000/rs6000-builtin-new.def: Add power7 and
power7-64 builtins.
Diff:
---
gcc/config/rs6000/rs6000-builtin-new.def | 39 ++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 1cb019bd4fb..0a17cad446c 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -1938,3 +1938,42 @@
XXSPLTD_V2DI vsx_xxspltd_v2di {}
+; Power7 builtins (ISA 2.06).
+[power7]
+ const unsigned int __builtin_addg6s (unsigned int, unsigned int);
+ ADDG6S addg6s {}
+
+ const signed long long __builtin_bpermd (signed long long, signed long long);
+ BPERMD bpermd_di {}
+
+ const unsigned int __builtin_cbcdtd (unsigned int);
+ CBCDTD cbcdtd {}
+
+ const unsigned int __builtin_cdtbcd (unsigned int);
+ CDTBCD cdtbcd {}
+
+ const signed int __builtin_divwe (signed int, signed int);
+ DIVWE dive_si {}
+
+ const unsigned int __builtin_divweu (unsigned int, unsigned int);
+ DIVWEU diveu_si {}
+
+ const vsq __builtin_pack_vector_int128 (unsigned long long, unsigned long long);
+ PACK_V1TI packv1ti {}
+
+ void __builtin_ppc_speculation_barrier ();
+ SPECBARR speculation_barrier {}
+
+ const unsigned long long __builtin_unpack_vector_int128 (vsq, const int<1>);
+ UNPACK_V1TI unpackv1ti {}
+
+
+; Power7 builtins requiring 64-bit GPRs (even with 32-bit addressing).
+[power7-64]
+ const signed long long __builtin_divde (signed long long, signed long long);
+ DIVDE dive_di {}
+
+ const unsigned long long __builtin_divdeu (unsigned long long, unsigned long long);
+ DIVDEU diveu_di {}
+
+
^ permalink raw reply [flat|nested] 10+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins3)] rs6000: Add Power7 builtins
@ 2020-07-17 17:23 William Schmidt
0 siblings, 0 replies; 10+ messages in thread
From: William Schmidt @ 2020-07-17 17:23 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:5eca84d59193ab38a7caf18b88393dab4315fc04
commit 5eca84d59193ab38a7caf18b88393dab4315fc04
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Wed Jun 17 11:32:04 2020 -0500
rs6000: Add Power7 builtins
2020-06-17 Bill Schmidt <wschmidt@linux.ibm.com>
* config/rs6000/rs6000-builtin-new.def: Add MASK_POPCNTD builtins.
Diff:
---
gcc/config/rs6000/rs6000-builtin-new.def | 39 ++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 871df324911..387ea7aff32 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -1937,3 +1937,42 @@
XXSPLTD_V2DI vsx_xxspltd_v2di {}
+; Power7 builtins (ISA 2.06).
+[MASK_POPCNTD]
+ const unsigned int __builtin_addg6s (unsigned int, unsigned int);
+ ADDG6S addg6s {}
+
+ const signed long long __builtin_bpermd (signed long long, signed long long);
+ BPERMD bpermd_di {}
+
+ const unsigned int __builtin_cbcdtd (unsigned int);
+ CBCDTD cbcdtd {}
+
+ const unsigned int __builtin_cdtbcd (unsigned int);
+ CDTBCD cdtbcd {}
+
+ const signed int __builtin_divwe (signed int, signed int);
+ DIVWE dive_si {}
+
+ const unsigned int __builtin_divweu (unsigned int, unsigned int);
+ DIVWEU diveu_si {}
+
+ const vsq __builtin_pack_vector_int128 (unsigned long long, unsigned long long);
+ PACK_V1TI packv1ti {}
+
+ void __builtin_ppc_speculation_barrier ();
+ SPECBARR speculation_barrier {}
+
+ const unsigned long long __builtin_unpack_vector_int128 (vsq, const int<1>);
+ UNPACK_V1TI unpackv1ti {}
+
+
+; Power7 builtins requiring 64-bit GPRs (even with 32-bit addressing).
+[(MASK_POPCNTD | MASK_POWERPC64)]
+ const signed long long __builtin_divde (signed long long, signed long long);
+ DIVDE dive_di {}
+
+ const unsigned long long __builtin_divdeu (unsigned long long, unsigned long long);
+ DIVDEU diveu_di {}
+
+
^ permalink raw reply [flat|nested] 10+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins3)] rs6000: Add Power7 builtins
@ 2020-06-17 20:05 William Schmidt
0 siblings, 0 replies; 10+ messages in thread
From: William Schmidt @ 2020-06-17 20:05 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:a7669c0997df18c42ba84f707ea3fd722f24c52e
commit a7669c0997df18c42ba84f707ea3fd722f24c52e
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Wed Jun 17 11:32:04 2020 -0500
rs6000: Add Power7 builtins
2020-06-17 Bill Schmidt <wschmidt@linux.ibm.com>
* config/rs6000/rs6000-builtin-new.def: Add MASK_POPCNTD builtins.
Diff:
---
gcc/config/rs6000/rs6000-builtin-new.def | 39 ++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 871df324911..387ea7aff32 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -1937,3 +1937,42 @@
XXSPLTD_V2DI vsx_xxspltd_v2di {}
+; Power7 builtins (ISA 2.06).
+[MASK_POPCNTD]
+ const unsigned int __builtin_addg6s (unsigned int, unsigned int);
+ ADDG6S addg6s {}
+
+ const signed long long __builtin_bpermd (signed long long, signed long long);
+ BPERMD bpermd_di {}
+
+ const unsigned int __builtin_cbcdtd (unsigned int);
+ CBCDTD cbcdtd {}
+
+ const unsigned int __builtin_cdtbcd (unsigned int);
+ CDTBCD cdtbcd {}
+
+ const signed int __builtin_divwe (signed int, signed int);
+ DIVWE dive_si {}
+
+ const unsigned int __builtin_divweu (unsigned int, unsigned int);
+ DIVWEU diveu_si {}
+
+ const vsq __builtin_pack_vector_int128 (unsigned long long, unsigned long long);
+ PACK_V1TI packv1ti {}
+
+ void __builtin_ppc_speculation_barrier ();
+ SPECBARR speculation_barrier {}
+
+ const unsigned long long __builtin_unpack_vector_int128 (vsq, const int<1>);
+ UNPACK_V1TI unpackv1ti {}
+
+
+; Power7 builtins requiring 64-bit GPRs (even with 32-bit addressing).
+[(MASK_POPCNTD | MASK_POWERPC64)]
+ const signed long long __builtin_divde (signed long long, signed long long);
+ DIVDE dive_di {}
+
+ const unsigned long long __builtin_divdeu (unsigned long long, unsigned long long);
+ DIVDEU diveu_di {}
+
+
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