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* [gcc(refs/users/wschmidt/heads/builtins3)] rs6000: Start cleaning up some discrepancies
@ 2020-09-16 21:31 William Schmidt
0 siblings, 0 replies; 5+ messages in thread
From: William Schmidt @ 2020-09-16 21:31 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:a45bb50ff6461c4c8281beec951ba61f6b2f2a2d
commit a45bb50ff6461c4c8281beec951ba61f6b2f2a2d
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Fri Aug 28 16:11:33 2020 -0500
rs6000: Start cleaning up some discrepancies
2020-08-28 Bill Schmidt <wschmidt@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtin-new.def
(__builtin_altivec_mask_for_store): Remove.
(__builtin_altivec_xst_len_r): Rename to __builtin_vec_xst_len_r.
(__builtin_vsx_scalar_cmp_exp_qp_eq): Fix typo in name.
(__builtin_altivec_vextduwvhx): Likewise.
* config/rs6000/rs6000-builtin.def (MASK_FOR_STORE): Remove.
* config/rs6000/rs6000-call.c (rs6000_expand_ldst_mask): Remove
all logic for ALTIVEC_BUILTIN_MASK_FOR_STORE.
(rs6000_expand_builtin): Likewise.
(altivec_init_builtins): Add debug code for
__builtin_altivec_mask_for_load.
Diff:
---
gcc/config/rs6000/rs6000-builtin-new.def | 11 ++++------
gcc/config/rs6000/rs6000-call.c | 35 +++++++++++++-------------------
2 files changed, 18 insertions(+), 28 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index ddf4a4605a4..c0f8821be64 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -356,9 +356,6 @@
vuc __builtin_altivec_mask_for_load (long long, void *);
MASK_FOR_LOAD altivec_lvsr_direct {ldstmask}
- vuc __builtin_altivec_mask_for_store (long long, void *);
- MASK_FOR_STORE altivec_lvsr_direct {ldstmask}
-
vus __builtin_altivec_mfvscr ();
MFVSCR altivec_mfvscr {}
@@ -2723,10 +2720,10 @@
; 32 bits, and the return value is DImode, so it seems that
; TARGET_64BIT (actually TARGET_POWERPC64) is justified. TBD. ####
[power9-64]
-; The following two are inexplicably named __builtin_altivec_* while
+; The following two are inexplicably named __builtin_{alti,}vec_* while
; their load counterparts are __builtin_vsx_*. Need to deprecate
; these interfaces in favor of the other naming scheme (or vice versa).
- void __builtin_altivec_xst_len_r (vop, void *, unsigned long long);
+ void __builtin_vec_xst_len_r (vop, void *, unsigned long long);
XST_LEN_R xst_len_r {}
void __builtin_altivec_stxvl (vop, void *, unsigned long long);
@@ -2774,7 +2771,7 @@
const unsigned __int128 __builtin_vsx_scalar_extract_sigq (_Float128);
VSESQP xsxsigqp_kf {}
- const signed int __buiiltin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128);
+ const signed int __builtin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128);
VSCEQPEQ xscmpexpqp_eq_kf {}
const signed int __builtin_vsx_scalar_cmp_exp_qp_gt (_Float128, _Float128);
@@ -3042,7 +3039,7 @@
const vull __builtin_altivec_vextduhvlx (vus, vus, unsigned char);
VEXTRACTHL vextractlv8hi {}
- const vull __builtin_altivec_vextduwvrx (vui, vui, unsigned char);
+ const vull __builtin_altivec_vextduwvhx (vui, vui, unsigned char);
VEXTRACTWR vextractrv4si {}
const vull __builtin_altivec_vextduwvlx (vui, vui, unsigned char);
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index 304481f1b24..9600801b838 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -13177,7 +13177,7 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
return false;
}
-/* Expand ALTIVEC_BUILTIN_MASK_FOR_LOAD/STORE. */
+/* Expand ALTIVEC_BUILTIN_MASK_FOR_LOAD. */
rtx
rs6000_expand_ldst_mask (rtx target, rs6000_builtins fcode, tree arg0)
{
@@ -13192,16 +13192,10 @@ rs6000_expand_ldst_mask (rtx target, rs6000_builtins fcode, tree arg0)
gcc_assert (POINTER_TYPE_P (TREE_TYPE (arg0)));
op = expand_expr (arg0, NULL_RTX, Pmode, EXPAND_NORMAL);
addr = memory_address (mode, op);
- if (fcode == ALTIVEC_BUILTIN_MASK_FOR_STORE)
- op = addr;
- else
- {
- gcc_assert (fcode == ALTIVEC_BUILTIN_MASK_FOR_LOAD);
- /* For the load case need to negate the address. */
- op = gen_reg_rtx (GET_MODE (addr));
- emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr),
- addr)));
- }
+ gcc_assert (fcode == ALTIVEC_BUILTIN_MASK_FOR_LOAD);
+ /* We need to negate the address. */
+ op = gen_reg_rtx (GET_MODE (addr));
+ emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr), addr)));
op = gen_rtx_MEM (mode, op);
if (target == 0
@@ -13670,7 +13664,6 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
}
case ALTIVEC_BUILTIN_MASK_FOR_LOAD:
- case ALTIVEC_BUILTIN_MASK_FOR_STORE:
{
int icode2 = (BYTES_BIG_ENDIAN ? (int) CODE_FOR_altivec_lvsr_direct
: (int) CODE_FOR_altivec_lvsl_direct);
@@ -13685,15 +13678,9 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
gcc_assert (POINTER_TYPE_P (TREE_TYPE (arg)));
op = expand_expr (arg, NULL_RTX, Pmode, EXPAND_NORMAL);
addr = memory_address (mode, op);
- if (fcode == ALTIVEC_BUILTIN_MASK_FOR_STORE)
- op = addr;
- else
- {
- /* For the load case need to negate the address. */
- op = gen_reg_rtx (GET_MODE (addr));
- emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr),
- addr)));
- }
+ /* We need to negate the address. */
+ op = gen_reg_rtx (GET_MODE (addr));
+ emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr), addr)));
op = gen_rtx_MEM (mode, op);
if (target == 0
@@ -14716,6 +14703,12 @@ altivec_init_builtins (void)
ALTIVEC_BUILTIN_MASK_FOR_LOAD,
BUILT_IN_MD, NULL, NULL_TREE);
TREE_READONLY (decl) = 1;
+ if (TARGET_DEBUG_BUILTIN)
+ fprintf (stderr, "%s __builtin_altivec_mask_for_load (%s); [%4d]\n",
+ rs6000_debug_type (TREE_TYPE (v16qi_ftype_pcvoid)),
+ rs6000_debug_type (TREE_VALUE
+ (TYPE_ARG_TYPES (v16qi_ftype_pcvoid))),
+ (int) ALTIVEC_BUILTIN_MASK_FOR_LOAD);
/* Record the decl. Will be used by rs6000_builtin_mask_for_load. */
altivec_builtin_mask_for_load = decl;
^ permalink raw reply [flat|nested] 5+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins3)] rs6000: Start cleaning up some discrepancies
@ 2020-10-29 19:52 William Schmidt
0 siblings, 0 replies; 5+ messages in thread
From: William Schmidt @ 2020-10-29 19:52 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:635f15e20d76fd732c9c70cf779ad52bb64d1b81
commit 635f15e20d76fd732c9c70cf779ad52bb64d1b81
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Fri Aug 28 16:11:33 2020 -0500
rs6000: Start cleaning up some discrepancies
2020-08-28 Bill Schmidt <wschmidt@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtin-new.def
(__builtin_altivec_mask_for_store): Remove.
(__builtin_altivec_xst_len_r): Rename to __builtin_vec_xst_len_r.
(__builtin_vsx_scalar_cmp_exp_qp_eq): Fix typo in name.
(__builtin_altivec_vextduwvhx): Likewise.
* config/rs6000/rs6000-builtin.def (MASK_FOR_STORE): Remove.
* config/rs6000/rs6000-call.c (rs6000_expand_ldst_mask): Remove
all logic for ALTIVEC_BUILTIN_MASK_FOR_STORE.
(rs6000_expand_builtin): Likewise.
(altivec_init_builtins): Add debug code for
__builtin_altivec_mask_for_load.
Diff:
---
gcc/config/rs6000/rs6000-builtin-new.def | 11 ++++------
gcc/config/rs6000/rs6000-call.c | 35 +++++++++++++-------------------
2 files changed, 18 insertions(+), 28 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index ddf4a4605a4..c0f8821be64 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -356,9 +356,6 @@
vuc __builtin_altivec_mask_for_load (long long, void *);
MASK_FOR_LOAD altivec_lvsr_direct {ldstmask}
- vuc __builtin_altivec_mask_for_store (long long, void *);
- MASK_FOR_STORE altivec_lvsr_direct {ldstmask}
-
vus __builtin_altivec_mfvscr ();
MFVSCR altivec_mfvscr {}
@@ -2723,10 +2720,10 @@
; 32 bits, and the return value is DImode, so it seems that
; TARGET_64BIT (actually TARGET_POWERPC64) is justified. TBD. ####
[power9-64]
-; The following two are inexplicably named __builtin_altivec_* while
+; The following two are inexplicably named __builtin_{alti,}vec_* while
; their load counterparts are __builtin_vsx_*. Need to deprecate
; these interfaces in favor of the other naming scheme (or vice versa).
- void __builtin_altivec_xst_len_r (vop, void *, unsigned long long);
+ void __builtin_vec_xst_len_r (vop, void *, unsigned long long);
XST_LEN_R xst_len_r {}
void __builtin_altivec_stxvl (vop, void *, unsigned long long);
@@ -2774,7 +2771,7 @@
const unsigned __int128 __builtin_vsx_scalar_extract_sigq (_Float128);
VSESQP xsxsigqp_kf {}
- const signed int __buiiltin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128);
+ const signed int __builtin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128);
VSCEQPEQ xscmpexpqp_eq_kf {}
const signed int __builtin_vsx_scalar_cmp_exp_qp_gt (_Float128, _Float128);
@@ -3042,7 +3039,7 @@
const vull __builtin_altivec_vextduhvlx (vus, vus, unsigned char);
VEXTRACTHL vextractlv8hi {}
- const vull __builtin_altivec_vextduwvrx (vui, vui, unsigned char);
+ const vull __builtin_altivec_vextduwvhx (vui, vui, unsigned char);
VEXTRACTWR vextractrv4si {}
const vull __builtin_altivec_vextduwvlx (vui, vui, unsigned char);
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index 0a7286b560b..afc5147a1b6 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -13366,7 +13366,7 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
return false;
}
-/* Expand ALTIVEC_BUILTIN_MASK_FOR_LOAD/STORE. */
+/* Expand ALTIVEC_BUILTIN_MASK_FOR_LOAD. */
rtx
rs6000_expand_ldst_mask (rtx target, rs6000_builtins fcode, tree arg0)
{
@@ -13381,16 +13381,10 @@ rs6000_expand_ldst_mask (rtx target, rs6000_builtins fcode, tree arg0)
gcc_assert (POINTER_TYPE_P (TREE_TYPE (arg0)));
op = expand_expr (arg0, NULL_RTX, Pmode, EXPAND_NORMAL);
addr = memory_address (mode, op);
- if (fcode == ALTIVEC_BUILTIN_MASK_FOR_STORE)
- op = addr;
- else
- {
- gcc_assert (fcode == ALTIVEC_BUILTIN_MASK_FOR_LOAD);
- /* For the load case need to negate the address. */
- op = gen_reg_rtx (GET_MODE (addr));
- emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr),
- addr)));
- }
+ gcc_assert (fcode == ALTIVEC_BUILTIN_MASK_FOR_LOAD);
+ /* We need to negate the address. */
+ op = gen_reg_rtx (GET_MODE (addr));
+ emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr), addr)));
op = gen_rtx_MEM (mode, op);
if (target == 0
@@ -13859,7 +13853,6 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
}
case ALTIVEC_BUILTIN_MASK_FOR_LOAD:
- case ALTIVEC_BUILTIN_MASK_FOR_STORE:
{
int icode2 = (BYTES_BIG_ENDIAN ? (int) CODE_FOR_altivec_lvsr_direct
: (int) CODE_FOR_altivec_lvsl_direct);
@@ -13874,15 +13867,9 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
gcc_assert (POINTER_TYPE_P (TREE_TYPE (arg)));
op = expand_expr (arg, NULL_RTX, Pmode, EXPAND_NORMAL);
addr = memory_address (mode, op);
- if (fcode == ALTIVEC_BUILTIN_MASK_FOR_STORE)
- op = addr;
- else
- {
- /* For the load case need to negate the address. */
- op = gen_reg_rtx (GET_MODE (addr));
- emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr),
- addr)));
- }
+ /* We need to negate the address. */
+ op = gen_reg_rtx (GET_MODE (addr));
+ emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr), addr)));
op = gen_rtx_MEM (mode, op);
if (target == 0
@@ -14918,6 +14905,12 @@ altivec_init_builtins (void)
ALTIVEC_BUILTIN_MASK_FOR_LOAD,
BUILT_IN_MD, NULL, NULL_TREE);
TREE_READONLY (decl) = 1;
+ if (TARGET_DEBUG_BUILTIN)
+ fprintf (stderr, "%s __builtin_altivec_mask_for_load (%s); [%4d]\n",
+ rs6000_debug_type (TREE_TYPE (v16qi_ftype_pcvoid)),
+ rs6000_debug_type (TREE_VALUE
+ (TYPE_ARG_TYPES (v16qi_ftype_pcvoid))),
+ (int) ALTIVEC_BUILTIN_MASK_FOR_LOAD);
/* Record the decl. Will be used by rs6000_builtin_mask_for_load. */
altivec_builtin_mask_for_load = decl;
^ permalink raw reply [flat|nested] 5+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins3)] rs6000: Start cleaning up some discrepancies
@ 2020-10-27 16:30 William Schmidt
0 siblings, 0 replies; 5+ messages in thread
From: William Schmidt @ 2020-10-27 16:30 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:09127b2b28e420f7c157e675b921743bd5d0dc7b
commit 09127b2b28e420f7c157e675b921743bd5d0dc7b
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Fri Aug 28 16:11:33 2020 -0500
rs6000: Start cleaning up some discrepancies
2020-08-28 Bill Schmidt <wschmidt@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtin-new.def
(__builtin_altivec_mask_for_store): Remove.
(__builtin_altivec_xst_len_r): Rename to __builtin_vec_xst_len_r.
(__builtin_vsx_scalar_cmp_exp_qp_eq): Fix typo in name.
(__builtin_altivec_vextduwvhx): Likewise.
* config/rs6000/rs6000-builtin.def (MASK_FOR_STORE): Remove.
* config/rs6000/rs6000-call.c (rs6000_expand_ldst_mask): Remove
all logic for ALTIVEC_BUILTIN_MASK_FOR_STORE.
(rs6000_expand_builtin): Likewise.
(altivec_init_builtins): Add debug code for
__builtin_altivec_mask_for_load.
Diff:
---
gcc/config/rs6000/rs6000-builtin-new.def | 11 ++++------
gcc/config/rs6000/rs6000-call.c | 35 +++++++++++++-------------------
2 files changed, 18 insertions(+), 28 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index ddf4a4605a4..c0f8821be64 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -356,9 +356,6 @@
vuc __builtin_altivec_mask_for_load (long long, void *);
MASK_FOR_LOAD altivec_lvsr_direct {ldstmask}
- vuc __builtin_altivec_mask_for_store (long long, void *);
- MASK_FOR_STORE altivec_lvsr_direct {ldstmask}
-
vus __builtin_altivec_mfvscr ();
MFVSCR altivec_mfvscr {}
@@ -2723,10 +2720,10 @@
; 32 bits, and the return value is DImode, so it seems that
; TARGET_64BIT (actually TARGET_POWERPC64) is justified. TBD. ####
[power9-64]
-; The following two are inexplicably named __builtin_altivec_* while
+; The following two are inexplicably named __builtin_{alti,}vec_* while
; their load counterparts are __builtin_vsx_*. Need to deprecate
; these interfaces in favor of the other naming scheme (or vice versa).
- void __builtin_altivec_xst_len_r (vop, void *, unsigned long long);
+ void __builtin_vec_xst_len_r (vop, void *, unsigned long long);
XST_LEN_R xst_len_r {}
void __builtin_altivec_stxvl (vop, void *, unsigned long long);
@@ -2774,7 +2771,7 @@
const unsigned __int128 __builtin_vsx_scalar_extract_sigq (_Float128);
VSESQP xsxsigqp_kf {}
- const signed int __buiiltin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128);
+ const signed int __builtin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128);
VSCEQPEQ xscmpexpqp_eq_kf {}
const signed int __builtin_vsx_scalar_cmp_exp_qp_gt (_Float128, _Float128);
@@ -3042,7 +3039,7 @@
const vull __builtin_altivec_vextduhvlx (vus, vus, unsigned char);
VEXTRACTHL vextractlv8hi {}
- const vull __builtin_altivec_vextduwvrx (vui, vui, unsigned char);
+ const vull __builtin_altivec_vextduwvhx (vui, vui, unsigned char);
VEXTRACTWR vextractrv4si {}
const vull __builtin_altivec_vextduwvlx (vui, vui, unsigned char);
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index 0a7286b560b..afc5147a1b6 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -13366,7 +13366,7 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
return false;
}
-/* Expand ALTIVEC_BUILTIN_MASK_FOR_LOAD/STORE. */
+/* Expand ALTIVEC_BUILTIN_MASK_FOR_LOAD. */
rtx
rs6000_expand_ldst_mask (rtx target, rs6000_builtins fcode, tree arg0)
{
@@ -13381,16 +13381,10 @@ rs6000_expand_ldst_mask (rtx target, rs6000_builtins fcode, tree arg0)
gcc_assert (POINTER_TYPE_P (TREE_TYPE (arg0)));
op = expand_expr (arg0, NULL_RTX, Pmode, EXPAND_NORMAL);
addr = memory_address (mode, op);
- if (fcode == ALTIVEC_BUILTIN_MASK_FOR_STORE)
- op = addr;
- else
- {
- gcc_assert (fcode == ALTIVEC_BUILTIN_MASK_FOR_LOAD);
- /* For the load case need to negate the address. */
- op = gen_reg_rtx (GET_MODE (addr));
- emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr),
- addr)));
- }
+ gcc_assert (fcode == ALTIVEC_BUILTIN_MASK_FOR_LOAD);
+ /* We need to negate the address. */
+ op = gen_reg_rtx (GET_MODE (addr));
+ emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr), addr)));
op = gen_rtx_MEM (mode, op);
if (target == 0
@@ -13859,7 +13853,6 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
}
case ALTIVEC_BUILTIN_MASK_FOR_LOAD:
- case ALTIVEC_BUILTIN_MASK_FOR_STORE:
{
int icode2 = (BYTES_BIG_ENDIAN ? (int) CODE_FOR_altivec_lvsr_direct
: (int) CODE_FOR_altivec_lvsl_direct);
@@ -13874,15 +13867,9 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
gcc_assert (POINTER_TYPE_P (TREE_TYPE (arg)));
op = expand_expr (arg, NULL_RTX, Pmode, EXPAND_NORMAL);
addr = memory_address (mode, op);
- if (fcode == ALTIVEC_BUILTIN_MASK_FOR_STORE)
- op = addr;
- else
- {
- /* For the load case need to negate the address. */
- op = gen_reg_rtx (GET_MODE (addr));
- emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr),
- addr)));
- }
+ /* We need to negate the address. */
+ op = gen_reg_rtx (GET_MODE (addr));
+ emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr), addr)));
op = gen_rtx_MEM (mode, op);
if (target == 0
@@ -14918,6 +14905,12 @@ altivec_init_builtins (void)
ALTIVEC_BUILTIN_MASK_FOR_LOAD,
BUILT_IN_MD, NULL, NULL_TREE);
TREE_READONLY (decl) = 1;
+ if (TARGET_DEBUG_BUILTIN)
+ fprintf (stderr, "%s __builtin_altivec_mask_for_load (%s); [%4d]\n",
+ rs6000_debug_type (TREE_TYPE (v16qi_ftype_pcvoid)),
+ rs6000_debug_type (TREE_VALUE
+ (TYPE_ARG_TYPES (v16qi_ftype_pcvoid))),
+ (int) ALTIVEC_BUILTIN_MASK_FOR_LOAD);
/* Record the decl. Will be used by rs6000_builtin_mask_for_load. */
altivec_builtin_mask_for_load = decl;
^ permalink raw reply [flat|nested] 5+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins3)] rs6000: Start cleaning up some discrepancies
@ 2020-09-14 14:00 William Schmidt
0 siblings, 0 replies; 5+ messages in thread
From: William Schmidt @ 2020-09-14 14:00 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:e56d375a60e7ed03a5cdae06b4ced06cbc593f52
commit e56d375a60e7ed03a5cdae06b4ced06cbc593f52
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Fri Aug 28 16:11:33 2020 -0500
rs6000: Start cleaning up some discrepancies
2020-08-28 Bill Schmidt <wschmidt@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtin-new.def
(__builtin_altivec_mask_for_store): Remove.
(__builtin_altivec_xst_len_r): Rename to __builtin_vec_xst_len_r.
(__builtin_vsx_scalar_cmp_exp_qp_eq): Fix typo in name.
(__builtin_altivec_vextduwvhx): Likewise.
* config/rs6000/rs6000-builtin.def (MASK_FOR_STORE): Remove.
* config/rs6000/rs6000-call.c (rs6000_expand_ldst_mask): Remove
all logic for ALTIVEC_BUILTIN_MASK_FOR_STORE.
(rs6000_expand_builtin): Likewise.
(altivec_init_builtins): Add debug code for
__builtin_altivec_mask_for_load.
Diff:
---
gcc/config/rs6000/rs6000-builtin-new.def | 11 ++++------
gcc/config/rs6000/rs6000-call.c | 35 +++++++++++++-------------------
2 files changed, 18 insertions(+), 28 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index ddf4a4605a4..c0f8821be64 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -356,9 +356,6 @@
vuc __builtin_altivec_mask_for_load (long long, void *);
MASK_FOR_LOAD altivec_lvsr_direct {ldstmask}
- vuc __builtin_altivec_mask_for_store (long long, void *);
- MASK_FOR_STORE altivec_lvsr_direct {ldstmask}
-
vus __builtin_altivec_mfvscr ();
MFVSCR altivec_mfvscr {}
@@ -2723,10 +2720,10 @@
; 32 bits, and the return value is DImode, so it seems that
; TARGET_64BIT (actually TARGET_POWERPC64) is justified. TBD. ####
[power9-64]
-; The following two are inexplicably named __builtin_altivec_* while
+; The following two are inexplicably named __builtin_{alti,}vec_* while
; their load counterparts are __builtin_vsx_*. Need to deprecate
; these interfaces in favor of the other naming scheme (or vice versa).
- void __builtin_altivec_xst_len_r (vop, void *, unsigned long long);
+ void __builtin_vec_xst_len_r (vop, void *, unsigned long long);
XST_LEN_R xst_len_r {}
void __builtin_altivec_stxvl (vop, void *, unsigned long long);
@@ -2774,7 +2771,7 @@
const unsigned __int128 __builtin_vsx_scalar_extract_sigq (_Float128);
VSESQP xsxsigqp_kf {}
- const signed int __buiiltin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128);
+ const signed int __builtin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128);
VSCEQPEQ xscmpexpqp_eq_kf {}
const signed int __builtin_vsx_scalar_cmp_exp_qp_gt (_Float128, _Float128);
@@ -3042,7 +3039,7 @@
const vull __builtin_altivec_vextduhvlx (vus, vus, unsigned char);
VEXTRACTHL vextractlv8hi {}
- const vull __builtin_altivec_vextduwvrx (vui, vui, unsigned char);
+ const vull __builtin_altivec_vextduwvhx (vui, vui, unsigned char);
VEXTRACTWR vextractrv4si {}
const vull __builtin_altivec_vextduwvlx (vui, vui, unsigned char);
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index f5358924cec..c7057005a18 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -13177,7 +13177,7 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
return false;
}
-/* Expand ALTIVEC_BUILTIN_MASK_FOR_LOAD/STORE. */
+/* Expand ALTIVEC_BUILTIN_MASK_FOR_LOAD. */
rtx
rs6000_expand_ldst_mask (rtx target, rs6000_builtins fcode, tree arg0)
{
@@ -13192,16 +13192,10 @@ rs6000_expand_ldst_mask (rtx target, rs6000_builtins fcode, tree arg0)
gcc_assert (POINTER_TYPE_P (TREE_TYPE (arg0)));
op = expand_expr (arg0, NULL_RTX, Pmode, EXPAND_NORMAL);
addr = memory_address (mode, op);
- if (fcode == ALTIVEC_BUILTIN_MASK_FOR_STORE)
- op = addr;
- else
- {
- gcc_assert (fcode == ALTIVEC_BUILTIN_MASK_FOR_LOAD);
- /* For the load case need to negate the address. */
- op = gen_reg_rtx (GET_MODE (addr));
- emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr),
- addr)));
- }
+ gcc_assert (fcode == ALTIVEC_BUILTIN_MASK_FOR_LOAD);
+ /* We need to negate the address. */
+ op = gen_reg_rtx (GET_MODE (addr));
+ emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr), addr)));
op = gen_rtx_MEM (mode, op);
if (target == 0
@@ -13670,7 +13664,6 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
}
case ALTIVEC_BUILTIN_MASK_FOR_LOAD:
- case ALTIVEC_BUILTIN_MASK_FOR_STORE:
{
int icode2 = (BYTES_BIG_ENDIAN ? (int) CODE_FOR_altivec_lvsr_direct
: (int) CODE_FOR_altivec_lvsl_direct);
@@ -13685,15 +13678,9 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
gcc_assert (POINTER_TYPE_P (TREE_TYPE (arg)));
op = expand_expr (arg, NULL_RTX, Pmode, EXPAND_NORMAL);
addr = memory_address (mode, op);
- if (fcode == ALTIVEC_BUILTIN_MASK_FOR_STORE)
- op = addr;
- else
- {
- /* For the load case need to negate the address. */
- op = gen_reg_rtx (GET_MODE (addr));
- emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr),
- addr)));
- }
+ /* We need to negate the address. */
+ op = gen_reg_rtx (GET_MODE (addr));
+ emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr), addr)));
op = gen_rtx_MEM (mode, op);
if (target == 0
@@ -14716,6 +14703,12 @@ altivec_init_builtins (void)
ALTIVEC_BUILTIN_MASK_FOR_LOAD,
BUILT_IN_MD, NULL, NULL_TREE);
TREE_READONLY (decl) = 1;
+ if (TARGET_DEBUG_BUILTIN)
+ fprintf (stderr, "%s __builtin_altivec_mask_for_load (%s); [%4d]\n",
+ rs6000_debug_type (TREE_TYPE (v16qi_ftype_pcvoid)),
+ rs6000_debug_type (TREE_VALUE
+ (TYPE_ARG_TYPES (v16qi_ftype_pcvoid))),
+ (int) ALTIVEC_BUILTIN_MASK_FOR_LOAD);
/* Record the decl. Will be used by rs6000_builtin_mask_for_load. */
altivec_builtin_mask_for_load = decl;
^ permalink raw reply [flat|nested] 5+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins3)] rs6000: Start cleaning up some discrepancies
@ 2020-08-28 21:11 William Schmidt
0 siblings, 0 replies; 5+ messages in thread
From: William Schmidt @ 2020-08-28 21:11 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:e446855d3e281e76f28cef55270b9424c47ef717
commit e446855d3e281e76f28cef55270b9424c47ef717
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Fri Aug 28 16:11:33 2020 -0500
rs6000: Start cleaning up some discrepancies
2020-08-28 Bill Schmidt <wschmidt@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtin-new.def
(__builtin_altivec_mask_for_store): Remove.
(__builtin_altivec_xst_len_r): Rename to __builtin_vec_xst_len_r.
(__builtin_vsx_scalar_cmp_exp_qp_eq): Fix typo in name.
(__builtin_altivec_vextduwvhx): Likewise.
* config/rs6000/rs6000-builtin.def (MASK_FOR_STORE): Remove.
* config/rs6000/rs6000-call.c (rs6000_expand_ldst_mask): Remove
all logic for ALTIVEC_BUILTIN_MASK_FOR_STORE.
(rs6000_expand_builtin): Likewise.
(altivec_init_builtins): Add debug code for
__builtin_altivec_mask_for_load.
Diff:
---
gcc/config/rs6000/rs6000-builtin-new.def | 11 ++++------
gcc/config/rs6000/rs6000-builtin.def | 1 -
gcc/config/rs6000/rs6000-call.c | 35 +++++++++++++-------------------
3 files changed, 18 insertions(+), 29 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index ddf4a4605a4..c0f8821be64 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -356,9 +356,6 @@
vuc __builtin_altivec_mask_for_load (long long, void *);
MASK_FOR_LOAD altivec_lvsr_direct {ldstmask}
- vuc __builtin_altivec_mask_for_store (long long, void *);
- MASK_FOR_STORE altivec_lvsr_direct {ldstmask}
-
vus __builtin_altivec_mfvscr ();
MFVSCR altivec_mfvscr {}
@@ -2723,10 +2720,10 @@
; 32 bits, and the return value is DImode, so it seems that
; TARGET_64BIT (actually TARGET_POWERPC64) is justified. TBD. ####
[power9-64]
-; The following two are inexplicably named __builtin_altivec_* while
+; The following two are inexplicably named __builtin_{alti,}vec_* while
; their load counterparts are __builtin_vsx_*. Need to deprecate
; these interfaces in favor of the other naming scheme (or vice versa).
- void __builtin_altivec_xst_len_r (vop, void *, unsigned long long);
+ void __builtin_vec_xst_len_r (vop, void *, unsigned long long);
XST_LEN_R xst_len_r {}
void __builtin_altivec_stxvl (vop, void *, unsigned long long);
@@ -2774,7 +2771,7 @@
const unsigned __int128 __builtin_vsx_scalar_extract_sigq (_Float128);
VSESQP xsxsigqp_kf {}
- const signed int __buiiltin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128);
+ const signed int __builtin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128);
VSCEQPEQ xscmpexpqp_eq_kf {}
const signed int __builtin_vsx_scalar_cmp_exp_qp_gt (_Float128, _Float128);
@@ -3042,7 +3039,7 @@
const vull __builtin_altivec_vextduhvlx (vus, vus, unsigned char);
VEXTRACTHL vextractlv8hi {}
- const vull __builtin_altivec_vextduwvrx (vui, vui, unsigned char);
+ const vull __builtin_altivec_vextduwvhx (vui, vui, unsigned char);
VEXTRACTWR vextractrv4si {}
const vull __builtin_altivec_vextduwvlx (vui, vui, unsigned char);
diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def
index e9228e5425f..16f57eb073b 100644
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -1515,7 +1515,6 @@ BU_ALTIVEC_C (STVLXL, "stvlxl", MEM)
BU_ALTIVEC_C (STVRX, "stvrx", MEM)
BU_ALTIVEC_C (STVRXL, "stvrxl", MEM)
BU_ALTIVEC_X (MASK_FOR_LOAD, "mask_for_load", MISC)
-BU_ALTIVEC_X (MASK_FOR_STORE, "mask_for_store", MISC)
BU_ALTIVEC_X (VEC_INIT_V4SI, "vec_init_v4si", CONST)
BU_ALTIVEC_X (VEC_INIT_V8HI, "vec_init_v8hi", CONST)
BU_ALTIVEC_X (VEC_INIT_V16QI, "vec_init_v16qi", CONST)
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index d137de7e89c..c8ef4dc5229 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -13181,7 +13181,7 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
return false;
}
-/* Expand ALTIVEC_BUILTIN_MASK_FOR_LOAD/STORE. */
+/* Expand ALTIVEC_BUILTIN_MASK_FOR_LOAD. */
rtx
rs6000_expand_ldst_mask (rtx target, rs6000_builtins fcode, tree arg0)
{
@@ -13196,16 +13196,10 @@ rs6000_expand_ldst_mask (rtx target, rs6000_builtins fcode, tree arg0)
gcc_assert (POINTER_TYPE_P (TREE_TYPE (arg0)));
op = expand_expr (arg0, NULL_RTX, Pmode, EXPAND_NORMAL);
addr = memory_address (mode, op);
- if (fcode == ALTIVEC_BUILTIN_MASK_FOR_STORE)
- op = addr;
- else
- {
- gcc_assert (fcode == ALTIVEC_BUILTIN_MASK_FOR_LOAD);
- /* For the load case need to negate the address. */
- op = gen_reg_rtx (GET_MODE (addr));
- emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr),
- addr)));
- }
+ gcc_assert (fcode == ALTIVEC_BUILTIN_MASK_FOR_LOAD);
+ /* We need to negate the address. */
+ op = gen_reg_rtx (GET_MODE (addr));
+ emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr), addr)));
op = gen_rtx_MEM (mode, op);
if (target == 0
@@ -13674,7 +13668,6 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
}
case ALTIVEC_BUILTIN_MASK_FOR_LOAD:
- case ALTIVEC_BUILTIN_MASK_FOR_STORE:
{
int icode2 = (BYTES_BIG_ENDIAN ? (int) CODE_FOR_altivec_lvsr_direct
: (int) CODE_FOR_altivec_lvsl_direct);
@@ -13689,15 +13682,9 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
gcc_assert (POINTER_TYPE_P (TREE_TYPE (arg)));
op = expand_expr (arg, NULL_RTX, Pmode, EXPAND_NORMAL);
addr = memory_address (mode, op);
- if (fcode == ALTIVEC_BUILTIN_MASK_FOR_STORE)
- op = addr;
- else
- {
- /* For the load case need to negate the address. */
- op = gen_reg_rtx (GET_MODE (addr));
- emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr),
- addr)));
- }
+ /* We need to negate the address. */
+ op = gen_reg_rtx (GET_MODE (addr));
+ emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr), addr)));
op = gen_rtx_MEM (mode, op);
if (target == 0
@@ -14720,6 +14707,12 @@ altivec_init_builtins (void)
ALTIVEC_BUILTIN_MASK_FOR_LOAD,
BUILT_IN_MD, NULL, NULL_TREE);
TREE_READONLY (decl) = 1;
+ if (TARGET_DEBUG_BUILTIN)
+ fprintf (stderr, "%s __builtin_altivec_mask_for_load (%s); [%4d]\n",
+ rs6000_debug_type (TREE_TYPE (v16qi_ftype_pcvoid)),
+ rs6000_debug_type (TREE_VALUE
+ (TYPE_ARG_TYPES (v16qi_ftype_pcvoid))),
+ (int) ALTIVEC_BUILTIN_MASK_FOR_LOAD);
/* Record the decl. Will be used by rs6000_builtin_mask_for_load. */
altivec_builtin_mask_for_load = decl;
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2020-10-29 19:52 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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