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From: Jakub Jelinek <jakub@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc(refs/vendors/redhat/heads/gcc-8-branch)] aarch64: Add early clobber for aarch64_store_exclusive.
Date: Thu, 17 Sep 2020 16:57:24 +0000 (GMT)	[thread overview]
Message-ID: <20200917165724.DA3C0398B840@sourceware.org> (raw)

https://gcc.gnu.org/g:afe3fd8b7ace95b21dc35d0ca54e3bc392dbdbe9

commit afe3fd8b7ace95b21dc35d0ca54e3bc392dbdbe9
Author: Andre Vieira <andre.simoesdiasvieira@arm.com>
Date:   Thu Apr 16 10:16:07 2020 +0100

    aarch64: Add early clobber for aarch64_store_exclusive.
    
    gcc/ChangeLog:
    2020-04-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    
            Backport from mainline.
            2018-07-16  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
    
            * config/aarch64/atomics.md (aarch64_store_execlusive<mode>): Add
            early clobber.

Diff:
---
 gcc/ChangeLog                 | 9 +++++++++
 gcc/config/aarch64/atomics.md | 2 +-
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4b8c8d3be97..4cd2e2e2836 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2020-04-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
+	Backport from mainline.
+	2018-07-16  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+	* config/aarch64/atomics.md (aarch64_store_execlusive<mode>): Add
+	early clobber.
+
 2020-04-21  Martin Jambor  <mjambor@suse.cz>
 
 	Backport from master
@@ -40,6 +48,7 @@
 	* config/i386/i386.c (rest_of_insert_endbranch): Insert ENDBR at
 	function entry if function will be called indirectly.
 
+
 2020-04-15  Uroš Bizjak  <ubizjak@gmail.com>
 
 	PR target/94603
diff --git a/gcc/config/aarch64/atomics.md b/gcc/config/aarch64/atomics.md
index 686e39ff2ee..fba5ec6db58 100644
--- a/gcc/config/aarch64/atomics.md
+++ b/gcc/config/aarch64/atomics.md
@@ -530,7 +530,7 @@
 )
 
 (define_insn "aarch64_store_exclusive<mode>"
-  [(set (match_operand:SI 0 "register_operand" "=r")
+  [(set (match_operand:SI 0 "register_operand" "=&r")
     (unspec_volatile:SI [(const_int 0)] UNSPECV_SX))
    (set (match_operand:ALLI 1 "aarch64_sync_memory_operand" "=Q")
     (unspec_volatile:ALLI


                 reply	other threads:[~2020-09-17 16:57 UTC|newest]

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