[gcc r11-3294] Increase rtx cost of sse_to_integer in skylake_cost.

[gcc r11-3294] Increase rtx cost of sse_to_integer in skylake_cost.

[hongtao Liu]

https://gcc.gnu.org/g:83858ba1db31cd83667592a41d71315090459da4

commit r11-3294-g83858ba1db31cd83667592a41d71315090459da4
Author: liuhongt <hongtao.liu@intel.com>
Date:   Wed Sep 16 10:53:52 2020 +0800

    Increase rtx cost of sse_to_integer in skylake_cost.
    
    As https://gcc.gnu.org/pipermail/gcc-patches/2019-August/528839.html
    indicates, movement between SSE and gpr should be much expensive than
    movement inside gpr(which is 2 as default).
    
    gcc/ChangeLog
    
            PR target/96861
            * config/i386/x86-tune-costs.h (skylake_cost): increase rtx
            cost of sse_to_integer from 2 to 6.
    
    gcc/testsuite
    
            * gcc.target/i386/pr95021-3.c: Add -mtune=generic.

Diff:
---
 gcc/config/i386/x86-tune-costs.h          | 2 +-
 gcc/testsuite/gcc.target/i386/pr95021-3.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/i386/x86-tune-costs.h b/gcc/config/i386/x86-tune-costs.h
index 0ad4b28903c..5de414935f8 100644
--- a/gcc/config/i386/x86-tune-costs.h
+++ b/gcc/config/i386/x86-tune-costs.h
@@ -1769,7 +1769,7 @@ struct processor_costs skylake_cost = {
   {6, 6, 6, 10, 20},			/* cost of unaligned loads.  */
   {8, 8, 8, 8, 16},			/* cost of unaligned stores.  */
   2, 2, 4,				/* cost of moving XMM,YMM,ZMM register */
-  2,					/* cost of moving SSE register to integer.  */
+  6,					/* cost of moving SSE register to integer.  */
   20, 8,				/* Gather load static, per_elt.  */
   22, 10,				/* Gather store static, per_elt.  */
   64,					/* size of l1 cache.  */
diff --git a/gcc/testsuite/gcc.target/i386/pr95021-3.c b/gcc/testsuite/gcc.target/i386/pr95021-3.c
index 1748161a77c..52f9e4569b3 100644
--- a/gcc/testsuite/gcc.target/i386/pr95021-3.c
+++ b/gcc/testsuite/gcc.target/i386/pr95021-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile { target ia32 } } */
-/* { dg-options "-O2 -msse2 -mstv -mregparm=3 -W" } */
+/* { dg-options "-O2 -msse2 -mstv -mregparm=3 -W -mtune=generic" } */
 /* { dg-final { scan-assembler "movq\[ \t\]+\[^\n\]*, %xmm" } } */
 
 #include "pr95021-1.c"