[gcc(refs/vendors/ibm/heads/ieee-longdouble-001)] Update ChangeLog.meissner

[gcc(refs/vendors/ibm/heads/ieee-longdouble-001)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:a114c47f269518ec6188c96c87118affff69b339

commit a114c47f269518ec6188c96c87118affff69b339
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Sep 24 15:58:19 2020 -0400

    Update ChangeLog.meissner
    
    gcc/
    2020-09-24  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 483b0741879..22e78932399 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,9 @@
+2020-09-24  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/gcc-with-ieee-128bit-longdouble.txt: New file to
+	describe how to build GCC with long double defaulting to IEEE
+	128-bit.
+
 2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
 
 	* config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add

[gcc(refs/vendors/ibm/heads/ieee-longdouble-001)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:8afc4afd849a7ad6e9ebcd0551dfeb205c4329a0

commit 8afc4afd849a7ad6e9ebcd0551dfeb205c4329a0
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Sep 23 22:34:12 2020 -0400

    Update ChangeLog.meissner.
    
    libgcc/
    2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 libgcc/ChangeLog.meissner | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/libgcc/ChangeLog.meissner b/libgcc/ChangeLog.meissner
index 3301dbdb52f..59ac87281f1 100644
--- a/libgcc/ChangeLog.meissner
+++ b/libgcc/ChangeLog.meissner
@@ -1,3 +1,8 @@
+2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/ibm-ldouble.c (pack_ldouble): Use
+	__builtin_pack_ieee128 if long double is IEEE 128-bit.
+
 2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
 
 	* config/rs6000/_dd_to_kf.c: New file.

[gcc(refs/vendors/ibm/heads/ieee-longdouble-001)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:a4f73f1b90ccc39c017cdb7f1beb2c0505320c8d

commit a4f73f1b90ccc39c017cdb7f1beb2c0505320c8d
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Sep 23 17:18:05 2020 -0400

    Update ChangeLog.meissner
    
    gcc/
    2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.
    
    gcc/testsuite/
    2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.
    
    libgcc/
    2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner           | 36 ++++++++++++++++++++++++++++++++++++
 gcc/testsuite/ChangeLog.meissner | 35 +++++++++++++++++++++++++++++++++++
 libgcc/ChangeLog.meissner        | 27 +++++++++++++++++++++++++++
 3 files changed, 98 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 873c65a4fe1..483b0741879 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,39 @@
+2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
+	built-in functions for long double built-ins that use IEEE
+	128-bit.
+	(rs6000_expand_builtin): Change the KF IEEE 128-bit comparison
+	insns to TF if long double is IEEE 128-bit.
+	* config/rs6000/rs6000-builtin.def (scalar_extract_exptf): Add
+	support for long double being IEEE 128-bit built-in functions.
+	(scalar_extract_sigtf): Likewise.
+	(scalar_test_neg_tf): Likewise.
+	(scalar_insert_exp_tf): Likewise.
+	(scalar_insert_exp_tfp): Likewise.
+	(scalar_cmp_exp_tf_gt): Likewise.
+	(scalar_cmp_exp_tf_lt): Likewise.
+	(scalar_cmp_exp_tf_eq): Likewise.
+	(scalar_cmp_exp_tf_unordered): Likewise.
+	(scalar_test_data_class_tf): Likewise.
+
+2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
+	double is IEEE-128 map the nanq built-in functions to the long
+	double function, not the f128 function.
+
+2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000.c (rs6000_invalid_binary_op): Update error
+	messages about mixing IBM long double and IEEE 128-bit.
+
+2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000.c (rs6000_mangle_decl_assembler_name): Add
+	support for mapping built-in function names for long double
+	built-in functions if long double is IEEE 128-bit.
+
 2020-09-24  Michael Meissner  <meissner@linux.ibm.com>
 
 	* config/rs6000/pcrel-opt.c (pcrel_opt_store): New function.
diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner
index 9d7ca0d86c5..0ab2746d407 100644
--- a/gcc/testsuite/ChangeLog.meissner
+++ b/gcc/testsuite/ChangeLog.meissner
@@ -1,3 +1,38 @@
+2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/float128-cmp2-runnable.c: Use __float128
+	keyword instead of __ieee128.
+	* gcc.target/powerpc/pr92796.c: Use __float128 keyword instead of
+	__ieee128.
+
+2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
+
+	* c-c++-common/dfp/convert-bfp-11.c: If long double is IEEE
+	128-bit, skip the test.
+	* gcc.dg/nextafter-2.c: On PowerPC, if long double is IEEE
+	128-bit, include math.h to get the built-in mapped correctly.
+	* gcc.target/powerpc/pr70117.c: Add support for long double being
+	IEEE 128-bit.
+
+2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/bfp/scalar-extract-exp-4.c: Update failure
+	messages.
+	* gcc.target/powerpc/bfp/scalar-extract-sig-4.c: Update failure
+	messages.
+	* gcc.target/powerpc/bfp/scalar-test-data-class-11.c: Update
+	failure messages.
+	* gcc.target/powerpc/bfp/scalar-test-neg-5.c: Update failure
+	messages.
+	* gcc.target/powerpc/float128-mix-2.c: New test.
+	* gcc.target/powerpc/float128-mix-3.c: New test.
+	* gcc.target/powerpc/float128-mix.c: Update failure messages.
+
+2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/float128-longdouble-math.c: New test.
+	* gcc.target/powerpc/float128-longdouble-stdio.c: New test.
+
 2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
 
 	* gcc.target/powerpc/pcrel-opt-inc-di.c: New PCREL_OPT test.
diff --git a/libgcc/ChangeLog.meissner b/libgcc/ChangeLog.meissner
index 373d0a59707..3301dbdb52f 100644
--- a/libgcc/ChangeLog.meissner
+++ b/libgcc/ChangeLog.meissner
@@ -1,3 +1,30 @@
+2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/_dd_to_kf.c: New file.
+	* config/rs6000/_kf_to_dd.c: New file.
+	* config/rs6000/_kf_to_sd.c: New file.
+	* config/rs6000/_kf_to_td.c: New file.
+	* config/rs6000/_sd_to_kf.c: New file.
+	* config/rs6000/_td_to_kf.c: New file.
+	* config/rs6000/t-float128: Build __floating conversions to/from
+	Decimal support functions.  By default compile with long double
+	being IBM extended double.
+	* dfp-bit.c: Add support for building the PowerPC _Float128
+	to/from Decimal conversion functions.
+	* dfp-bit.h: Likewise.
+
+2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/extendkftf2-sw.c: Move __float128 to __ibm128
+	conversion into float128-convert.h.
+	* config/rs6000/float128-convert.h: New file.
+	* config/rs6000/float128-hw.c: Move conversions between __float128
+	and __ibm128 into float128-convert.h.
+	* config/rs6000/quad-float128.h: Move conversions between
+	__float128 and __ibm128 into float128-convert.h.
+	* config/rs6000/trunctfkf2-sw.c: Move __ibm128 to __float128
+	conversion to float128-convert.h.
+
 2020-09-23   Michael Meissner  <meissner@linux.ibm.com>
 
 	Clone branch

[gcc(refs/vendors/ibm/heads/ieee-longdouble-001)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:f0e0be65f9c8d6f46b6011744843a2ae29a4c0aa

commit f0e0be65f9c8d6f46b6011744843a2ae29a4c0aa
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Sep 23 16:35:35 2020 -0400

    Update ChangeLog.meissner
    
    gcc/
    2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.
    
    gcc/testsuite/
    2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner           | 53 ++++++++++++++++++++++++++++++++++++++++
 gcc/testsuite/ChangeLog.meissner | 19 +++++++++++++-
 2 files changed, 71 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 3e3882ac312..873c65a4fe1 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,56 @@
+2020-09-24  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/pcrel-opt.c (pcrel_opt_store): New function.
+	(pcrel_opt_address): Add PCREL_OPT support for stores.
+	(pcrel_opt_pass): Print PCREL_OPT store statistics.
+	* config/rs6000/pcrel-opt.md (UNSPEC_PCREL_OPT_ST_ADDR): New
+	unspec.
+	(UNSPEC_PCREL_OPT_ST_RELOC): New unspec.
+	(pcrel_opt_st_addr<mode>): New insns for PCREL_OPT store support.
+	(pcrel_opt_st<mode>, QHSI iterator): New insns for PCREL_OPT store
+	support.
+	(pcrel_opt_stdi): New insn for PCREL_OPT store support.
+	(pcrel_opt_stsf): New insn for PCREL_OPT store support.
+	(pcrel_opt_stdf): New insns for PCREL_OPT store support.
+	(pcrel_opt_st<mode>, PO_VECT iterator):  New insns for PCREL_OPT
+	store support.
+	* config/rs6000/rs6000.c (rs6000_delegitimize_address): Add
+	support for PCREL_OPT store.
+
+2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config.gcc (powerpc*-*-*): Add pcrel-opt.o.
+	(rs6000*-*-*): Add pcrel-opt.o.
+	* config/rs6000/pcrel-opt.c: New file.
+	* config/rs6000/pcrel-opt.md: New file.
+	* config/rs6000/predicates.md (d_form_memory): New predicate.
+	* config/rs6000/rs6000-cpus.def (OTHER_POWER10_MASKS): Add
+	-mpcrel-opt.
+	(POWERPC_MASKS): Add -mpcrel-opt.
+	* config/rs6000/rs6000-passes.def: Add comment for existing power8
+	swaps pass.  Add PCREL_OPT pass.
+	* config/rs6000/rs6000-protos.h (reg_to_non_prefixed): New
+	declaration.
+	(offsettable_non_prefixed_memory): New declaration.
+	(output_pcrel_opt_reloc): New declaration.
+	(make_pass_pcrel_opt): New declaration.
+	* config/rs6000/rs6000.c (reg_to_non_prefixed): Make function
+	globally visible.
+	(rs6000_option_override_internal): Add support for -mpcrel-opt.
+	(rs6000_delegitimize_address): Add support for the PCREL_OPT
+	addresses.
+	(rs6000_opt_masks): Add -mpcrel-opt.
+	(offsettable_non_prefixed_memory): New helper function.
+	(rs6000_asm_output_opcode): Reset prefixed flag after first use.
+	(output_pcrel_opt_reloc): New function.
+	* config/rs6000/rs6000.md (loads_extern_addr): New insn
+	attribute.
+	(pcrel_extern_addr): Set loads_extern_addr attribute.
+	(toplevel): Include pcrel-opt.md.
+	* config/rs6000/rs6000.opt (-mpcrel-opt): New option.
+	* config/rs6000/t-rs6000 (pcrel-opt.o): Add build rules.
+	(MD_INCLUDES): Add pcrel-opt.md
+
 2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
 
 	* config/rs6000/rs6000.c (have_compare_and_set_mask): Add IEEE
diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner
index c13e3fee3f2..9d7ca0d86c5 100644
--- a/gcc/testsuite/ChangeLog.meissner
+++ b/gcc/testsuite/ChangeLog.meissner
@@ -1,3 +1,21 @@
+2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/pcrel-opt-inc-di.c: New PCREL_OPT test.
+	* gcc.target/powerpc/pcrel-opt-ld-df.c: New PCREL_OPT test.
+	* gcc.target/powerpc/pcrel-opt-ld-di.c: New PCREL_OPT test.
+	* gcc.target/powerpc/pcrel-opt-ld-hi.c: New PCREL_OPT test.
+	* gcc.target/powerpc/pcrel-opt-ld-qi.c: New PCREL_OPT test.
+	* gcc.target/powerpc/pcrel-opt-ld-sf.c: New PCREL_OPT test.
+	* gcc.target/powerpc/pcrel-opt-ld-si.c: New PCREL_OPT test.
+	* gcc.target/powerpc/pcrel-opt-ld-vector.c: New PCREL_OPT test.
+	* gcc.target/powerpc/pcrel-opt-st-df.c: New PCREL_OPT test.
+	* gcc.target/powerpc/pcrel-opt-st-di.c: New PCREL_OPT test.
+	* gcc.target/powerpc/pcrel-opt-st-hi.c: New PCREL_OPT test.
+	* gcc.target/powerpc/pcrel-opt-st-qi.c: New PCREL_OPT test.
+	* gcc.target/powerpc/pcrel-opt-st-sf.c: New PCREL_OPT test.
+	* gcc.target/powerpc/pcrel-opt-st-si.c: New PCREL_OPT test.
+	* gcc.target/powerpc/pcrel-opt-st-vector.c: New PCREL_OPT test.
+
 2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
 
 	* gcc.target/powerpc/float128-cmove.c: New test.
@@ -10,4 +28,3 @@
 2020-09-23   Michael Meissner  <meissner@linux.ibm.com>
 
 	Clone branch
-

[gcc(refs/vendors/ibm/heads/ieee-longdouble-001)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:2e243a8e2b44d53da069f8c5542142984402dc5b

commit 2e243a8e2b44d53da069f8c5542142984402dc5b
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Sep 23 16:27:50 2020 -0400

    Update ChangeLog.meissner
    
    gcc/
    2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.
    
    gcc/testsuite/
    2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner           | 25 +++++++++++++++++++++++++
 gcc/testsuite/ChangeLog.meissner |  9 +++++++++
 2 files changed, 34 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 373d0a59707..3e3882ac312 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,28 @@
+2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000.c (have_compare_and_set_mask): Add IEEE
+	128-bit floating point types.
+	* config/rs6000/rs6000.md (FPMASK): New iterator.
+	(FPMASK2): New iterator.
+	(Fv mode attribute): Add KFmode and TFmode.
+	(mov<FPMASK:mode><FPMASK2:mode>cc_fpmask): Replace
+	mov<SFDF:mode><SFDF2:mode>cc_p9.  Add IEEE 128-bit fp support.
+	(mov<FPMASK:mode><FPMASK2:mode>cc_invert_fpmask): Replace
+	mov<SFDF:mode><SFDF2:mode>cc_invert_p9.  Add IEEE 128-bit fp
+	support.
+	(fpmask<mode>): Add IEEE 128-bit fp support.  Enable generator to
+	build te RTL.
+	(xxsel<mode>): Add IEEE 128-bit fp support.  Enable generator to
+	build te RTL.
+
+2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000.c (rs6000_emit_minmax): Add support for ISA
+	3.1 IEEE 128-bit floating point xsmaxcqp and xsmincqp instructions.
+	* config/rs6000/rs60000.h (FLOAT128_MIN_MAX_FPMASK_P): New macro.
+	* config/rs6000/rs6000.md (s<minmax><mode>3): Add support for the
+	ISA 3.1 IEEE 128-bit minimum and maximum instructions.
+
 2020-09-23   Michael Meissner  <meissner@linux.ibm.com>
 
 	Clone branch
diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner
index 373d0a59707..c13e3fee3f2 100644
--- a/gcc/testsuite/ChangeLog.meissner
+++ b/gcc/testsuite/ChangeLog.meissner
@@ -1,3 +1,12 @@
+2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/float128-cmove.c: New test.
+	* gcc.target/powerpc/float128-minmax-3.c: New test.
+
+2020-09-23  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/float128-minmax-2.c: New test.
+
 2020-09-23   Michael Meissner  <meissner@linux.ibm.com>
 
 	Clone branch